Store PCI device mapped memory ranges

This commit is contained in:
Josh Holtrop 2023-06-10 22:22:09 -04:00
parent c16aa0e9c3
commit 238659e94b

View File

@ -4,6 +4,7 @@ import hulk.cpu;
import hulk.klog; import hulk.klog;
import hulk.hurl; import hulk.hurl;
import hulk.hurl.a1; import hulk.hurl.a1;
import hulk.range;
struct Pci struct Pci
{ {
@ -35,6 +36,7 @@ struct Pci
ubyte if_id; ubyte if_id;
bool multifunction; bool multifunction;
ubyte header_type; ubyte header_type;
Range[6] memory_ranges;
void initialize(Address address, ushort vendor_id, ushort device_id) void initialize(Address address, ushort vendor_id, ushort device_id)
{ {
@ -61,6 +63,7 @@ struct Pci
private void map_memory_regions() private void map_memory_regions()
{ {
size_t range_index;
uint[2] r; uint[2] r;
uint[2] s; uint[2] s;
for (uint reg_no = 4u; reg_no <= 9u; reg_no++) for (uint reg_no = 4u; reg_no <= 9u; reg_no++)
@ -109,10 +112,13 @@ struct Pci
{ {
s[1] = 0xFFFF_FFFFu; s[1] = 0xFFFF_FFFFu;
} }
ulong addr = (cast(ulong)r[0] & 0xFFFF_FFF0u) | (cast(ulong)r[1] << 32u); ulong mm_region_address = (cast(ulong)r[0] & 0xFFFF_FFF0u) | (cast(ulong)r[1] << 32u);
ulong length = ~((cast(ulong)s[0] & 0xFFFF_FFF0u) | (cast(ulong)s[1] << 32u)) + 1u; ulong length = ~((cast(ulong)s[0] & 0xFFFF_FFF0u) | (cast(ulong)s[1] << 32u)) + 1u;
ulong flags = (r[0] & 0x8) != 0u ? PT_WRITE_THROUGH : 0u; ulong flags = (r[0] & 0x8) != 0u ? PT_WRITE_THROUGH : 0u;
Hurl.identity_map_range(addr, length, flags); Hurl.identity_map_range(mm_region_address, length, flags);
memory_ranges[range_index].address = mm_region_address;
memory_ranges[range_index].length = length;
range_index++;
if (is_64bit) if (is_64bit)
{ {
reg_no++; reg_no++;