Add cpuid1() and output bit enums

src/hulk/cpu.d

@@ -71,6 +71,70 @@ enum uint EFER_FFXSR = 0x4000u;
 enum uint EFER_TCE = 0x8000u;
 /** @} */
 
+/** CPUID 1 bits. @{ */
+enum uint CPUID_1_EDX_FPU = 0x1u;
+enum uint CPUID_1_EDX_VME = 0x2u;
+enum uint CPUID_1_EDX_DE = 0x4u;
+enum uint CPUID_1_EDX_PSE = 0x8u;
+enum uint CPUID_1_EDX_TSC = 0x10u;
+enum uint CPUID_1_EDX_MSR = 0x20u;
+enum uint CPUID_1_EDX_PAE = 0x40u;
+enum uint CPUID_1_EDX_MCE = 0x80u;
+enum uint CPUID_1_EDX_CX8 = 0x100u;
+enum uint CPUID_1_EDX_APIC = 0x200u;
+enum uint CPUID_1_EDX_SEP = 0x800u;
+enum uint CPUID_1_EDX_MTRR = 0x1000u;
+enum uint CPUID_1_EDX_PGE = 0x2000u;
+enum uint CPUID_1_EDX_MCA = 0x4000u;
+enum uint CPUID_1_EDX_CMOV = 0x8000u;
+enum uint CPUID_1_EDX_PAT = 0x1_0000u;
+enum uint CPUID_1_EDX_PSE36 = 0x2_0000u;
+enum uint CPUID_1_EDX_PSN = 0x4_0000u;
+enum uint CPUID_1_EDX_CLFSH = 0x8_0000u;
+enum uint CPUID_1_EDX_DS = 0x20_0000u;
+enum uint CPUID_1_EDX_ACPI = 0x40_0000u;
+enum uint CPUID_1_EDX_MMX = 0x80_0000u;
+enum uint CPUID_1_EDX_FXSR = 0x100_0000u;
+enum uint CPUID_1_EDX_SSE = 0x200_0000u;
+enum uint CPUID_1_EDX_SSE2 = 0x400_0000u;
+enum uint CPUID_1_EDX_SS = 0x800_0000u;
+enum uint CPUID_1_EDX_HTT = 0x1000_0000u;
+enum uint CPUID_1_EDX_TM = 0x2000_0000u;
+enum uint CPUID_1_EDX_IA64 = 0x4000_0000u;
+enum uint CPUID_1_EDX_PBE = 0x8000_0000u;
+enum uint CPUID_1_ECX_SSE3 = 0x1u;
+enum uint CPUID_1_ECX_PCLMULQDQ = 0x2u;
+enum uint CPUID_1_ECX_DTES64 = 0x4u;
+enum uint CPUID_1_ECX_MONITOR = 0x8u;
+enum uint CPUID_1_ECX_DSCPL = 0x10u;
+enum uint CPUID_1_ECX_VMX = 0x20u;
+enum uint CPUID_1_ECX_SMX = 0x40u;
+enum uint CPUID_1_ECX_EST = 0x80u;
+enum uint CPUID_1_ECX_TM2 = 0x100u;
+enum uint CPUID_1_ECX_SSSE3 = 0x200u;
+enum uint CPUID_1_ECX_CNXTID = 0x400u;
+enum uint CPUID_1_ECX_SDBG = 0x800u;
+enum uint CPUID_1_ECX_FMA = 0x1000u;
+enum uint CPUID_1_ECX_CX16 = 0x2000u;
+enum uint CPUID_1_ECX_XTPR = 0x4000u;
+enum uint CPUID_1_ECX_PDCM = 0x8000u;
+enum uint CPUID_1_ECX_PCID = 0x2_0000u;
+enum uint CPUID_1_ECX_DCA = 0x4_0000u;
+enum uint CPUID_1_ECX_SSE41 = 0x8_0000u;
+enum uint CPUID_1_ECX_SSE42 = 0x10_0000u;
+enum uint CPUID_1_ECX_X2APIC = 0x20_0000u;
+enum uint CPUID_1_ECX_MOVBE = 0x40_0000u;
+enum uint CPUID_1_ECX_POPCNT = 0x80_0000u;
+enum uint CPUID_1_ECX_TSCDEADLINE = 0x100_0000u;
+enum uint CPUID_1_ECX_AES = 0x200_0000u;
+enum uint CPUID_1_ECX_XSAVE = 0x400_0000u;
+enum uint CPUID_1_ECX_OSXSAVE = 0x800_0000u;
+enum uint CPUID_1_ECX_AVX = 0x1000_0000u;
+enum uint CPUID_1_ECX_F16C = 0x2000_0000u;
+enum uint CPUID_1_ECX_RDRND = 0x4000_0000u;
+enum uint CPUID_1_ECX_HYPERVISOR = 0x8000_0000u;
+/** @} */
+
 void cli()
 {
     __asm("cli", "");
@@ -171,3 +235,8 @@ void out32(ushort ioaddr, ulong v)
 {
     __asm("outl %eax, %dx", "{dx},{eax}", ioaddr, v);
 }
+
+void cpuid1(uint * ebx, uint * ecx, uint * edx)
+{
+    __asm("cpuid", "=*{ebx},=*{ecx},=*{edx},{eax}", ebx, ecx, edx, 1u);
+}