Begin parsing MCFG ACPI table
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parent
602a7525d2
commit
6514af8e94
@ -9,8 +9,14 @@ import hulk.memory;
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struct Acpi
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{
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enum uint APIC_SIGNATURE = 0x43495041u;
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enum uint XSDT_SIGNATURE = 0x54445358u;
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static uint signature(string s)
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{
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return s[0] | (s[1] << 8) | (s[2] << 16) | (s[3] << 24);
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}
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enum uint APIC_SIGNATURE = signature("APIC");
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enum uint MCFG_SIGNATURE = signature("MCFG");
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enum uint XSDT_SIGNATURE = signature("XSDT");
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static align(4) struct XsdtHeader
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{
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@ -53,6 +59,38 @@ struct Acpi
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ubyte length;
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}
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static struct MCFGTable
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{
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/* PCI Segment Group Memory Area Descriptor. */
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static struct SGMADesc
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{
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uint[2] base_address_a;
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ushort pci_segment_group_number;
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ubyte start_pci_bus_number;
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ubyte end_pci_bus_number;
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uint _reserved;
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public @property ulong base_address() const
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{
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return base_address_a[0] | (cast(ulong)base_address_a[1] << 32);
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}
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}
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static assert(SGMADesc.sizeof == 16);
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static assert(SGMADesc.alignof == 4);
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uint signature;
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uint length;
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ubyte revision;
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ubyte checksum;
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char[6] oemid;
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ulong oemtableid;
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uint oem_revision;
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uint creator_id;
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uint creator_revision;
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uint[2] _reserved;
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SGMADesc[0] sgma_descs;
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}
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public static __gshared ulong apic_address;
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public static void initialize(ulong acpi_xsdt_phys)
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@ -83,6 +121,10 @@ struct Acpi
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{
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parse_apic_table(address);
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}
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else if (signature == MCFG_SIGNATURE)
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{
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parse_mcfg_table(address);
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}
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}
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}
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@ -105,4 +147,21 @@ struct Acpi
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}
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}
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}
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private static parse_mcfg_table(ulong address)
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{
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const(MCFGTable) * mcfg_table = cast(const(MCFGTable) *)address;
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Hurl.identity_map_range(address, mcfg_table.length, 0u);
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Klog.writefln("MCFG length = %u", mcfg_table.length);
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size_t n_sgma_descs = (mcfg_table.length - MCFGTable.sgma_descs.offsetof) / MCFGTable.SGMADesc.sizeof;
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Klog.writefln("# SGMA descriptors = %u", (mcfg_table.length - MCFGTable.sgma_descs.offsetof) / MCFGTable.SGMADesc.sizeof);
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for (size_t i = 0; i < n_sgma_descs; i++)
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{
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Klog.writefln("SGMA %u: SG %u; Bus %u-%u; addr %p",
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i, mcfg_table.sgma_descs[i].pci_segment_group_number,
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mcfg_table.sgma_descs[i].start_pci_bus_number,
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mcfg_table.sgma_descs[i].end_pci_bus_number,
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mcfg_table.sgma_descs[i].base_address);
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}
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}
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}
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@ -84,7 +84,7 @@ struct XHCI
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void initialize(Pci.Device * pci_device)
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{
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void * base_address = pci_device.memory_ranges[0].address;
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Klog.writefln("Found XHCI controller at address %x", base_address);
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Klog.writefln("Found XHCI controller at address %p", base_address);
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m_capability_registers = cast(CapabilityRegisters *)base_address;
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m_operational_registers = cast(OperationalRegisters *)(base_address + m_capability_registers.capability_length);
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/* TODO: confirm if 0x400 offset is from m_operation_registers or base_address. */
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