dev checkpoint
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@ -64,9 +64,9 @@ struct apic
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/* Enable local APIC to receive interrupts and set spurious interrupt
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* vector to 0xFF. */
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apic_registers.spurious_interrupt_vector.value = 0x1FFu;
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apic_registers.lvt_timer.value = idt.EXCEPTION_LAPIC_TIMER | PERIODIC_MODE;
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apic_registers.lvt_lint[0].value = idt.EXCEPTION_LAPIC_LINT0;
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apic_registers.lvt_lint[1].value = idt.EXCEPTION_LAPIC_LINT1;
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apic_registers.lvt_timer.value = idt.INT_LAPIC_TIMER | PERIODIC_MODE;
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apic_registers.lvt_lint[0].value = idt.INT_LAPIC_LINT0;
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apic_registers.lvt_lint[1].value = idt.INT_LAPIC_LINT1;
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apic_registers.divide_configuration.value = 3u;
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}
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@ -77,6 +77,7 @@ struct apic
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public static void isr(ulong vector)
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{
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klog.writefln("APIC ISR 0x%x", vector);
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eoi();
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}
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}
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@ -20,6 +20,7 @@ import ldc.llvmasm;
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import hulk.pic;
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import hulk.acpi;
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import hulk.apic;
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import hulk.rtc;
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extern extern(C) __gshared ubyte _hulk_bss_size;
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@ -73,6 +74,7 @@ void hulk_start()
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pic.initialize();
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acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
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apic.initialize();
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rtc.initialize();
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sti();
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for (;;)
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@ -9,12 +9,16 @@ import hulk.fb;
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import hulk.console;
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import hulk.klog;
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import hulk.apic;
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import hulk.rtc;
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struct idt
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{
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public static enum ulong EXCEPTION_LAPIC_TIMER = 0x70u;
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public static enum ulong EXCEPTION_LAPIC_LINT0 = 0x71u;
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public static enum ulong EXCEPTION_LAPIC_LINT1 = 0x72u;
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/* IRQ 0 is interrupt 32 (0x20). */
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public static enum ulong INT_RTC = 0x28u; /* IRQ 8 */
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public static enum ulong INT_LAPIC_TIMER = 0x70u;
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public static enum ulong INT_LAPIC_LINT0 = 0x71u;
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public static enum ulong INT_LAPIC_LINT1 = 0x72u;
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struct idtr_t
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{
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@ -99,12 +103,19 @@ struct idt
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public extern(C) void isr(ulong vector, ulong arg)
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{
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if ((idt.EXCEPTION_LAPIC_TIMER <= vector) && (vector <= idt.EXCEPTION_LAPIC_LINT1))
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switch (vector)
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{
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case idt.INT_RTC:
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rtc.isr();
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break;
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case idt.INT_LAPIC_TIMER:
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case idt.INT_LAPIC_LINT0:
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case idt.INT_LAPIC_LINT1:
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apic.isr(vector);
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}
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else
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{
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break;
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default:
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console.clear();
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fb.clear(0xFF8000u);
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klog.writefln("ISR %u, 0x%x", vector, arg);
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57
src/hulk/rtc.d
Normal file
57
src/hulk/rtc.d
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@ -0,0 +1,57 @@
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/**
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* RTC (Real-Time Clock) functionality.
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*/
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module hulk.rtc;
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import hulk.cpu;
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import hulk.klog;
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struct rtc
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{
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private enum ubyte PORT_SELECT = 0x70u;
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private enum ubyte PORT_DATA = 0x71u;
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private enum ubyte DISABLE_NMI = 0x80u;
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private enum ubyte SR_A = 0xAu;
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private enum ubyte SR_B = 0xBu;
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private enum ubyte SR_C = 0xCu;
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private enum ubyte SR_B_ENABLE_IRQ = 0x40u;
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public static void initialize()
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{
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/* Enable IRQ 8 to receive RTC interrupts. */
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out8(PORT_SELECT, DISABLE_NMI | SR_B);
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ubyte sr_b = in8(PORT_DATA);
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out8(PORT_SELECT, DISABLE_NMI | SR_B);
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out8(PORT_DATA, sr_b | SR_B_ENABLE_IRQ);
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out8(PORT_SELECT, DISABLE_NMI | SR_A);
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klog.writefln("SR_A = 0x%x", in8(PORT_DATA));
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/* Send EOI to enable more RTC interrupts and re-enable NMIs. */
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eoi();
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}
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private static void eoi()
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{
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/* Read from status register C to clear the interrupt. */
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out8(PORT_SELECT, SR_C);
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in8(PORT_DATA);
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}
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public static void isr()
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{
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static __gshared ulong count;
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static __gshared ulong seconds;
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klog.writefln("RTC ISR!");
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count++;
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if ((count % 1024) == 0u)
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{
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seconds++;
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klog.writefln("Seconds: %u", seconds);
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}
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eoi();
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}
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}
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