Document xHCI runtime registers and interrupter registers
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@ -255,11 +255,69 @@ struct XHCI
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}
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static assert(PortRegisters.sizeof == 0x10u);
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/**
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* Located at offset rts_offset from PCI base address.
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*/
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struct RuntimeRegisters
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{
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/**
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* Microframe index. Incremented by controller each microframe.
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*/
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uint mfindex;
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uint[7] _reserved01;
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uint ir;
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/**
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* Interrupter register sets.
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*/
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InterrupterRegister[0] ir;
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}
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/**
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* Interrupter register set.
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*
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* A copy of this register set is present for each interrupter.
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*/
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struct InterrupterRegister
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{
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/**
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* Interrupter Management Register.
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* 0 Interrupt Pending (IP)
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* 1 Interrupt Enable
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* 31:2 reserved
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*/
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uint imr;
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/**
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* Interrupter Moderation.
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* 15:0 Interrupt Moderation Interval
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* 31:16 Interrupt Moderation Counter
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*/
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uint im;
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/**
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* Event Ring Segment Table Size.
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* 15:0 Event Ring Segment Table Size
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* 31:16 reserved
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*/
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uint ersts;
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uint reserved;
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/**
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* Event Ring Segment Table Base Address.
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* 5:0 reserved
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* 63:6 Event Ring Segment Table Base Address
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*/
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ulong erstba;
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/**
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* Event Ring Dequeue Pointer.
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* 2:0 Dequeue ERST Segment Index
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* 3 Event Handler Busy
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* 63:4 Event Ring Dequeue Pointer
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*/
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ulong erdp;
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}
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struct DoorbellRegister
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