From e480bd0ed068bcbfc09be9a8688045c3bd2cbd94 Mon Sep 17 00:00:00 2001 From: Josh Holtrop Date: Wed, 25 Oct 2023 12:02:44 -0400 Subject: [PATCH] Enable PIT ISR to count milliseconds --- src/hulk/apic.d | 10 ++++++++++ src/hulk/hulk.d | 3 ++- src/hulk/pit.d | 8 ++++++-- src/hulk/rtc.d | 2 -- 4 files changed, 18 insertions(+), 5 deletions(-) diff --git a/src/hulk/apic.d b/src/hulk/apic.d index e388d84..2fa25e0 100644 --- a/src/hulk/apic.d +++ b/src/hulk/apic.d @@ -7,11 +7,14 @@ import hulk.hurl; import hulk.acpi; import hulk.idt; import hulk.rtc; +import hulk.pit; +import hulk.klog; struct Apic { private enum uint PERIODIC_MODE = 0x2_0000u; + private enum ulong IRQ_PIT = 2u; private enum ulong IRQ_RTC = 8u; static struct ApicRegister @@ -77,6 +80,8 @@ struct Apic apic_registers.lvt_timer.value = Idt.INT_APIC_TIMER; apic_registers.lvt_lint[0].value = Idt.INT_APIC_LINT0; apic_registers.lvt_lint[1].value = Idt.INT_APIC_LINT1; + /* Enable PIT interrupt. */ + configure_io_apic_irq(IRQ_PIT, Idt.INT_APIC_BASE + IRQ_PIT); /* Enable RTC interrupt. */ configure_io_apic_irq(IRQ_RTC, Idt.INT_APIC_BASE + IRQ_RTC); } @@ -99,11 +104,16 @@ struct Apic { switch (vector) { + case Idt.INT_APIC_BASE + IRQ_PIT: + Pit.isr(); + break; + case Idt.INT_APIC_BASE + IRQ_RTC: Rtc.isr(); break; default: + Klog.writefln("Unhandled APIC ISR %u", vector); break; } eoi(); diff --git a/src/hulk/hulk.d b/src/hulk/hulk.d index 59e94fe..d20a80f 100644 --- a/src/hulk/hulk.d +++ b/src/hulk/hulk.d @@ -23,6 +23,7 @@ import hulk.apic; import hulk.rtc; import hulk.serial; import hulk.usb; +import hulk.pit; extern extern(C) __gshared ubyte _hulk_bss_size; @@ -81,7 +82,7 @@ void hulk_start() Rtc.time t = Rtc.read_rtc_time(); Klog.writefln("System time is 20%02u-%02u-%02u %02u:%02u:%02u", t.year, t.month, t.day, t.hour, t.minute, t.second); - + Pit.initialize(); Pci.initialize(); Usb.initialize(); sti(); diff --git a/src/hulk/pit.d b/src/hulk/pit.d index 55d838d..33184e8 100644 --- a/src/hulk/pit.d +++ b/src/hulk/pit.d @@ -5,12 +5,13 @@ module hulk.pit; import hulk.cpu; import hulk.klog; +import hulk.console; struct Pit { /** PIT input frequency in 1/1000 Hz. */ private enum ulong PIT_FREQUENCY_1000HZ = 1_193_181_667u; - private enum ulong TARGET_INTERRUPT_HZ = 100u; + private enum ulong TARGET_INTERRUPT_HZ = 1000u; private enum ulong TARGET_INTERRUPT_1000HZ = TARGET_INTERRUPT_HZ * 1000u; private enum ulong PIT_DIVIDER = (PIT_FREQUENCY_1000HZ + TARGET_INTERRUPT_1000HZ / 2u) / TARGET_INTERRUPT_1000HZ; @@ -28,8 +29,11 @@ struct Pit private enum ubyte MC_RATE_GENERATOR = 0x04u; private enum ubyte MC_BINARY = 0x00u; + private static __gshared ulong milliseconds; + public static void initialize() { + Klog.writefln("\a3Initializing PIT"); out8(PORT_MC, MC_CH_0 | MC_LO_HI | MC_RATE_GENERATOR | MC_BINARY); out8(PORT_CH_0, PIT_DIVIDER & 0xFFu); out8(PORT_CH_0, PIT_DIVIDER >> 8u); @@ -37,6 +41,6 @@ struct Pit public static void isr() { - Klog.writefln("PIT ISR"); + milliseconds++; } } diff --git a/src/hulk/rtc.d b/src/hulk/rtc.d index 0be2d13..9c14c30 100644 --- a/src/hulk/rtc.d +++ b/src/hulk/rtc.d @@ -79,11 +79,9 @@ struct Rtc public static void isr() { static __gshared ulong count; - static __gshared ulong seconds; count++; if ((count % 1024) == 0u) { - seconds++; Console.update_header(); } eoi();