diff --git a/src/hulk/cpu.d b/src/hulk/cpu.d
index 7a3ab64..bfa5458 100644
--- a/src/hulk/cpu.d
+++ b/src/hulk/cpu.d
@@ -5,6 +5,57 @@ module hulk.cpu;
 
 import ldc.llvmasm;
 
+/** CR0 bits. @{ */
+enum ulong CR0_PE = 0x1u;
+enum ulong CR0_MP = 0x2u;
+enum ulong CR0_EM = 0x4u;
+enum ulong CR0_TS = 0x8u;
+enum ulong CR0_ET = 0x10u;
+enum ulong CR0_NE = 0x20u;
+enum ulong CR0_WP = 0x1_0000u;
+enum ulong CR0_AM = 0x4_0000u;
+enum ulong CR0_NW = 0x2000_0000u;
+enum ulong CR0_CD = 0x4000_0000u;
+enum ulong CR0_PG = 0x8000_0000u;
+/** @} */
+
+/** CR4 bits. @{ */
+enum ulong CR4_VME = 0x1u;
+enum ulong CR4_PVI = 0x2u;
+enum ulong CR4_TSD = 0x4u;
+enum ulong CR4_DE = 0x8u;
+enum ulong CR4_PSE = 0x10u;
+enum ulong CR4_PAE = 0x20u;
+enum ulong CR4_MCE = 0x40u;
+enum ulong CR4_PGE = 0x80u;
+enum ulong CR4_PCE = 0x100u;
+enum ulong CR4_OSFXSR = 0x200u;
+enum ulong CR4_OSXMMEXCPT = 0x400u;
+enum ulong CR4_UMIP = 0x800u;
+enum ulong CR4_VMXE = 0x2000u;
+enum ulong CR4_SMXE = 0x4000u;
+enum ulong CR4_FSGSBASE = 0x1_0000u;
+enum ulong CR4_PCIDE = 0x2_0000u;
+enum ulong CR4_OSXSAVE = 0x4_0000u;
+enum ulong CR4_SMEP = 0x10_0000u;
+enum ulong CR4_SMAP = 0x20_0000u;
+enum ulong CR4_PKE = 0x40_0000u;
+enum ulong CR4_CET = 0x80_0000u;
+enum ulong CR4_PKS = 0x100_0000u;
+/** @} */
+
+/** XCR0 bits. @{ */
+enum ulong XCR0_X87 = 0x1u;
+enum ulong XCR0_SSE = 0x2u;
+enum ulong XCR0_AVX = 0x4u;
+enum ulong XCR0_BNDREG = 0x8u;
+enum ulong XCR0_BNDSCR = 0x10u;
+enum ulong XCR0_OPMASK = 0x20u;
+enum ulong XCR0_ZMM_HI256 = 0x40u;
+enum ulong XCR0_HI16_ZMM = 0x80u;
+enum ulong XCR0_PKRU = 0x100u;
+/** @} */
+
 /** MSR register numbers. @{ */
 enum uint MSR_EFER = 0xC000_0080u;
 /** @} */