dev checkpoint

src/hulk/apic.d

@@ -64,9 +64,9 @@ struct apic
         /* Enable local APIC to receive interrupts and set spurious interrupt
          * vector to 0xFF. */
         apic_registers.spurious_interrupt_vector.value = 0x1FFu;
-        apic_registers.lvt_timer.value = idt.EXCEPTION_LAPIC_TIMER | PERIODIC_MODE;
-        apic_registers.lvt_lint[0].value = idt.EXCEPTION_LAPIC_LINT0;
-        apic_registers.lvt_lint[1].value = idt.EXCEPTION_LAPIC_LINT1;
+        apic_registers.lvt_timer.value = idt.INT_LAPIC_TIMER | PERIODIC_MODE;
+        apic_registers.lvt_lint[0].value = idt.INT_LAPIC_LINT0;
+        apic_registers.lvt_lint[1].value = idt.INT_LAPIC_LINT1;
         apic_registers.divide_configuration.value = 3u;
     }
 
@@ -77,6 +77,7 @@ struct apic
 
     public static void isr(ulong vector)
     {
+        klog.writefln("APIC ISR 0x%x", vector);
         eoi();
     }
 }

src/hulk/hulk.d

@@ -20,6 +20,7 @@ import ldc.llvmasm;
 import hulk.pic;
 import hulk.acpi;
 import hulk.apic;
+import hulk.rtc;
 
 extern extern(C) __gshared ubyte _hulk_bss_size;
 
@@ -73,6 +74,7 @@ void hulk_start()
     pic.initialize();
     acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
     apic.initialize();
+    rtc.initialize();
     sti();
 
     for (;;)

src/hulk/idt.d

@@ -9,12 +9,16 @@ import hulk.fb;
 import hulk.console;
 import hulk.klog;
 import hulk.apic;
+import hulk.rtc;
 
 struct idt
 {
-    public static enum ulong EXCEPTION_LAPIC_TIMER = 0x70u;
-    public static enum ulong EXCEPTION_LAPIC_LINT0 = 0x71u;
-    public static enum ulong EXCEPTION_LAPIC_LINT1 = 0x72u;
+    /* IRQ 0 is interrupt 32 (0x20). */
+    public static enum ulong INT_RTC = 0x28u; /* IRQ 8 */
+
+    public static enum ulong INT_LAPIC_TIMER = 0x70u;
+    public static enum ulong INT_LAPIC_LINT0 = 0x71u;
+    public static enum ulong INT_LAPIC_LINT1 = 0x72u;
 
     struct idtr_t
     {
@@ -99,12 +103,19 @@ struct idt
 
 public extern(C) void isr(ulong vector, ulong arg)
 {
-    if ((idt.EXCEPTION_LAPIC_TIMER <= vector) && (vector <= idt.EXCEPTION_LAPIC_LINT1))
+    switch (vector)
     {
+    case idt.INT_RTC:
+        rtc.isr();
+        break;
+
+    case idt.INT_LAPIC_TIMER:
+    case idt.INT_LAPIC_LINT0:
+    case idt.INT_LAPIC_LINT1:
         apic.isr(vector);
-    }
-    else
-    {
+        break;
+
+    default:
         console.clear();
         fb.clear(0xFF8000u);
         klog.writefln("ISR %u, 0x%x", vector, arg);

src/hulk/rtc.d

@@ -0,0 +1,57 @@
+/**
+ * RTC (Real-Time Clock) functionality.
+ */
+module hulk.rtc;
+
+import hulk.cpu;
+import hulk.klog;
+
+struct rtc
+{
+    private enum ubyte PORT_SELECT = 0x70u;
+    private enum ubyte PORT_DATA = 0x71u;
+
+    private enum ubyte DISABLE_NMI = 0x80u;
+
+    private enum ubyte SR_A = 0xAu;
+    private enum ubyte SR_B = 0xBu;
+    private enum ubyte SR_C = 0xCu;
+
+    private enum ubyte SR_B_ENABLE_IRQ = 0x40u;
+
+    public static void initialize()
+    {
+        /* Enable IRQ 8 to receive RTC interrupts. */
+        out8(PORT_SELECT, DISABLE_NMI | SR_B);
+        ubyte sr_b = in8(PORT_DATA);
+        out8(PORT_SELECT, DISABLE_NMI | SR_B);
+        out8(PORT_DATA, sr_b | SR_B_ENABLE_IRQ);
+
+        out8(PORT_SELECT, DISABLE_NMI | SR_A);
+        klog.writefln("SR_A = 0x%x", in8(PORT_DATA));
+
+        /* Send EOI to enable more RTC interrupts and re-enable NMIs. */
+        eoi();
+    }
+
+    private static void eoi()
+    {
+        /* Read from status register C to clear the interrupt. */
+        out8(PORT_SELECT, SR_C);
+        in8(PORT_DATA);
+    }
+
+    public static void isr()
+    {
+        static __gshared ulong count;
+        static __gshared ulong seconds;
+        klog.writefln("RTC ISR!");
+        count++;
+        if ((count % 1024) == 0u)
+        {
+            seconds++;
+            klog.writefln("Seconds: %u", seconds);
+        }
+        eoi();
+    }
+}