22 Commits
Author SHA1 Message Date
josh 40ff805f7d Add Pci.Address struct 2023-06-10 09:35:52 -04:00
josh 9ac69c9003 Add Pci.write_config_register() 2023-06-10 09:19:58 -04:00
josh 7aa28da1ef Allow pointers or integers for Hurl.*map_range() 2023-06-09 23:38:52 -04:00
josh 222a1efea4 Fix address calculation in Hurl.identity_map_range() 2023-06-09 23:27:20 -04:00
josh 7a4edf38f0 Scan for multi-function PCI devices 2023-06-08 20:28:32 -04:00
josh dda1b6379f Fix in32()/out32() to use uint instead of ulong 2023-06-08 16:07:44 -04:00
josh 98134957e7 Print APIC table signatures found 2023-06-08 13:21:43 -04:00
josh 22463e729b writef: add %c format specifier support 2023-06-08 13:21:24 -04:00
josh 8de86dd647 Add Pci.init_device() skeleton 2023-06-07 16:49:54 -04:00
josh f6fde01b06 Fix build error -- import hulk.util 2023-04-05 01:08:55 -04:00
josh ea6f485bd9 Add hulk.util and round_up_power_2() 2023-02-24 21:15:33 -05:00
josh 2ab388f2e9 Remove seconds counter printout 2023-02-24 20:58:11 -05:00
josh cc891f6d4d Assign PCI header fields to named variables 2023-02-24 20:53:46 -05:00
josh f5e5c40c12 Reduce Hurl.map() template overhead 2023-01-02 20:46:12 -05:00
josh 7b09c9beed Add A1 memory allocator 2023-01-01 22:02:48 -05:00
josh 103205bff2 Move address constants into Hurl struct 2023-01-01 21:04:29 -05:00
josh 25ee1775f0 Capitalize namespacing structs
This helps to avoid name clashes when breaking up modules into packages.
2023-01-01 17:34:41 -05:00
josh a423cdf1b1 Fix RTC clock reading in 24-hour mode 2022-12-19 11:32:08 -05:00
josh 7c8744d1e0 Read RTC date and time 2022-12-18 22:29:12 -05:00
josh 4081a220ef Route I/O APIC interrupts, enable RTC tick interrupt 2022-12-16 00:32:49 -05:00
josh 9adc248225 Initialize rtc module 2022-12-15 20:41:44 -05:00
josh 676fd17bf5 Add pit and rtc modules 2022-12-15 20:41:15 -05:00
21 changed files with 549 additions and 118 deletions

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+1 -1
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@@ -103,7 +103,7 @@ static void generate(const char * d_file_name)
fprintf(fh, " int baseline_offset;\n");
fprintf(fh, " const CharInfo[] chars;\n");
fprintf(fh, "};\n");
fprintf(fh, "__gshared const FontInfo kfont = {\n");
fprintf(fh, "__gshared const FontInfo Kfont = {\n");
fprintf(fh, " %du,\n", line_height);
fprintf(fh, " %du,\n", max_advance);
fprintf(fh, " %d,\n", baseline_offset);
+14 -8
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@@ -7,7 +7,7 @@ import hulk.hurl;
import hulk.klog;
import hulk.memory;
struct acpi
struct Acpi
{
enum uint APIC_SIGNATURE = 0x43495041u;
enum uint XSDT_SIGNATURE = 0x54445358u;
@@ -58,34 +58,40 @@ struct acpi
public static void initialize(ulong acpi_xsdt_phys)
{
/* Map the XSDT header. */
hurl.identity_map_range(acpi_xsdt_phys, Xsdt.sizeof, 0u);
Hurl.identity_map_range(acpi_xsdt_phys, Xsdt.sizeof, 0u);
const(Xsdt) * xsdt = cast(const(Xsdt) *)acpi_xsdt_phys;
if (xsdt.header.signature != XSDT_SIGNATURE)
{
klog.writef("XSDT signature invalid\n");
Klog.writef("XSDT signature invalid\n");
return;
}
/* Map the entire XSDT. */
hurl.identity_map_range(acpi_xsdt_phys, xsdt.header.length, 0u);
Hurl.identity_map_range(acpi_xsdt_phys, xsdt.header.length, 0u);
size_t n_entries = (xsdt.header.length - xsdt.header.sizeof) / xsdt.tables[0].sizeof;
for (size_t i = 0u; i < n_entries; i++)
{
ulong address = xsdt.tables[i];
hurl.identity_map_range(address, 4u, 0u);
Hurl.identity_map_range(address, 4u, 0u);
uint signature = *cast(const(uint) *)address;
if (signature == APIC_SIGNATURE)
{
parse_apic_table(address);
}
Klog.writefln("Found ACPI table %08x (%c%c%c%c)",
signature,
signature & 0xFFu,
(signature >> 8u) & 0xFFu,
(signature >> 16u) & 0xFFu,
(signature >> 24u) & 0xFFu);
}
}
private static parse_apic_table(ulong address)
{
const(MadtHeader) * madt_header = cast(const(MadtHeader) *)address;
hurl.identity_map_range(address, madt_header.length, 0u);
Hurl.identity_map_range(address, madt_header.length, 0u);
apic_address = madt_header.local_apic_address;
klog.writefln("Found 32-bit APIC address: 0x%x", apic_address);
Klog.writefln("Found 32-bit APIC address: 0x%x", apic_address);
const(void) * madt_end = cast(const(void) *)(address + madt_header.length);
const(MadtEntry) * madt_entry = cast(const(MadtEntry) *)(address + 0x2Cu);
while (madt_entry < madt_end)
@@ -95,7 +101,7 @@ struct acpi
{
/* Found a 64-bit Local APIC Address Override entry. */
memcpy(cast(void *)&apic_address, cast(const(void) *)madt_entry + 4u, 8u);
klog.writefln("Found 64-bit APIC address: 0x%x", apic_address);
Klog.writefln("Found 64-bit APIC address: 0x%x", apic_address);
}
}
}
+43 -11
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@@ -7,11 +7,14 @@ import hulk.klog;
import hulk.hurl;
import hulk.acpi;
import hulk.idt;
import hulk.rtc;
struct apic
struct Apic
{
private enum uint PERIODIC_MODE = 0x2_0000u;
private enum ulong IRQ_RTC = 8u;
static struct ApicRegister
{
public uint value;
@@ -52,31 +55,60 @@ struct apic
ApicRegister divide_configuration;
}
static struct IoApicRegisters
{
ApicRegister address;
ApicRegister data;
}
private static __gshared ApicRegisters * apic_registers;
private static __gshared IoApicRegisters * io_apic_registers;
public static void initialize()
{
apic_registers = cast(ApicRegisters *)acpi.apic_address;
hurl.map(cast(ulong)apic_registers, cast(ulong)apic_registers,
apic_registers = cast(ApicRegisters *)Acpi.apic_address;
io_apic_registers = cast(IoApicRegisters *)0xFEC0_0000u;
Hurl.map(cast(ulong)apic_registers, cast(ulong)apic_registers,
PT_WRITABLE | PT_WRITE_THROUGH | PT_DISABLE_CACHE | PT_NO_EXECUTE);
klog.writefln("LAPIC ID: 0x%08x", apic_registers.lapic_id.value);
klog.writefln("LAPIC version: 0x%08x", apic_registers.lapic_version.value);
Hurl.map(cast(ulong)io_apic_registers, cast(ulong)io_apic_registers,
PT_WRITABLE | PT_WRITE_THROUGH | PT_DISABLE_CACHE | PT_NO_EXECUTE);
Klog.writefln("LAPIC ID: 0x%08x", apic_registers.lapic_id.value);
Klog.writefln("LAPIC version: 0x%08x", apic_registers.lapic_version.value);
/* Enable local APIC to receive interrupts and set spurious interrupt
* vector to 0xFF. */
apic_registers.spurious_interrupt_vector.value = 0x1FFu;
apic_registers.lvt_timer.value = idt.EXCEPTION_LAPIC_TIMER | PERIODIC_MODE;
apic_registers.lvt_lint[0].value = idt.EXCEPTION_LAPIC_LINT0;
apic_registers.lvt_lint[1].value = idt.EXCEPTION_LAPIC_LINT1;
apic_registers.divide_configuration.value = 3u;
apic_registers.spurious_interrupt_vector.value = 0x100u | Idt.INT_APIC_SPURIOUS;
apic_registers.lvt_timer.value = Idt.INT_APIC_TIMER;
apic_registers.lvt_lint[0].value = Idt.INT_APIC_LINT0;
apic_registers.lvt_lint[1].value = Idt.INT_APIC_LINT1;
/* Enable RTC interrupt. */
configure_io_apic_irq(IRQ_RTC, Idt.INT_APIC_BASE + IRQ_RTC);
}
private static void eoi()
private static void configure_io_apic_irq(size_t io_apic_irq, size_t interrupt_id)
{
ulong entry = interrupt_id;
io_apic_registers.address.value = cast(uint)(0x10u + io_apic_irq * 2u);
io_apic_registers.data.value = entry & 0xFFFF_FFFFu;
io_apic_registers.address.value = cast(uint)(0x10u + io_apic_irq * 2u + 1u);
io_apic_registers.data.value = entry >> 32u;
}
public static void eoi()
{
apic_registers.eoi.value = 0u;
}
public static void isr(ulong vector)
{
switch (vector)
{
case Idt.INT_APIC_BASE + IRQ_RTC:
Rtc.isr();
break;
default:
break;
}
eoi();
}
}
+12 -12
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@@ -6,7 +6,7 @@ module hulk.console;
import hulk.fb;
import hulk.kfont;
struct console
struct Console
{
/** Console width in text columns. */
private static __gshared size_t m_width;
@@ -25,8 +25,8 @@ struct console
*/
public static void initialize()
{
m_width = fb.width / kfont.advance;
m_height = fb.height / kfont.line_height;
m_width = Fb.width / Kfont.advance;
m_height = Fb.height / Kfont.line_height;
}
/**
@@ -34,7 +34,7 @@ struct console
*/
public static void clear()
{
fb.clear();
Fb.clear();
m_x = 0u;
m_y = 0u;
}
@@ -64,10 +64,10 @@ struct console
if (m_y == m_height)
{
m_y--;
fb.copy_rows_up(fb_y(m_height - 1u),
(m_height - 1u) * kfont.line_height,
kfont.line_height);
fb.rect(0u, fb_y(m_height - 1u), fb_x(m_width), kfont.line_height, 0u);
Fb.copy_rows_up(fb_y(m_height - 1u),
(m_height - 1u) * Kfont.line_height,
Kfont.line_height);
Fb.rect(0u, fb_y(m_height - 1u), fb_x(m_width), Kfont.line_height, 0u);
}
}
@@ -80,8 +80,8 @@ struct console
*/
private static void render_char(size_t x, size_t y, char ch)
{
const(CharInfo) * ci = &kfont.chars[ch];
fb.blit_alpha_bitmap(fb_x(x) + ci.left, fb_y(y) + ci.top - ci.height, ci.bitmap, ci.width, ci.height);
const(CharInfo) * ci = &Kfont.chars[ch];
Fb.blit_alpha_bitmap(fb_x(x) + ci.left, fb_y(y) + ci.top - ci.height, ci.bitmap, ci.width, ci.height);
}
/**
@@ -89,7 +89,7 @@ struct console
*/
private static size_t fb_x(size_t x)
{
return x * kfont.advance;
return x * Kfont.advance;
}
/**
@@ -97,6 +97,6 @@ struct console
*/
private static size_t fb_y(size_t y)
{
return fb.height - ((y + 1u) * kfont.line_height);
return Fb.height - ((y + 1u) * Kfont.line_height);
}
}
+3 -3
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@@ -221,9 +221,9 @@ ushort in16(ushort ioaddr)
return __asm!ushort("inw %dx, %ax", "={ax},{dx}", ioaddr);
}
ulong in32(ushort ioaddr)
uint in32(ushort ioaddr)
{
return __asm!ulong("inl %dx, %eax", "={eax},{dx}", ioaddr);
return __asm!uint("inl %dx, %eax", "={eax},{dx}", ioaddr);
}
void out8(ushort ioaddr, ubyte v)
@@ -236,7 +236,7 @@ void out16(ushort ioaddr, ushort v)
__asm("outw %ax, %dx", "{dx},{ax}", ioaddr, v);
}
void out32(ushort ioaddr, ulong v)
void out32(ushort ioaddr, uint v)
{
__asm("outl %eax, %dx", "{dx},{eax}", ioaddr, v);
}
+3 -3
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@@ -11,7 +11,7 @@ import hulk.kfont;
*
* TODO: Handle other pixel formats. Currently only BGRx is supported.
*/
struct fb
struct Fb
{
/** Device frame buffer base address. */
private __gshared static uint * m_device_buffer;
@@ -141,8 +141,8 @@ struct fb
*/
static void character(int x, int y, char ch, uint color)
{
const(CharInfo) * ci = &kfont.chars[ch];
blend_alpha_bitmap(x + ci.left, y + kfont.baseline_offset + ci.top - ci.height, ci.bitmap, ci.width, ci.height, color);
const(CharInfo) * ci = &Kfont.chars[ch];
blend_alpha_bitmap(x + ci.left, y + Kfont.baseline_offset + ci.top - ci.height, ci.bitmap, ci.width, ci.height, color);
}
/**
+1 -1
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@@ -5,7 +5,7 @@ module hulk.gdt;
import ldc.llvmasm;
struct gdt
struct Gdt
{
struct gdtr_t
{
+1 -1
View File
@@ -7,7 +7,7 @@
*/
module hulk.hippo;
struct hippo
struct Hippo
{
/**
* Linked list node entry for a physical page.
+17 -15
View File
@@ -20,6 +20,7 @@ import ldc.llvmasm;
import hulk.pic;
import hulk.acpi;
import hulk.apic;
import hulk.rtc;
extern extern(C) __gshared ubyte _hulk_bss_size;
@@ -28,9 +29,9 @@ private __gshared HulkHeader hulk_header = {
&_hulk_bss_size, /* hulk_bss_size */
&hulk_start, /* entry */
16u * 1024u, /* stack_size */
HULK_VIRTUAL_BASE_ADDRESS, /* virt_base */
HULK_VIRTUAL_STACK_TOP_ADDRESS, /* virt_stack_top */
HULK_VIRTUAL_FRAMEBUFFER_ADDRESS, /* virt_fb_buffer */
Hurl.HULK_BASE, /* virt_base */
Hurl.HULK_STACK_TOP, /* virt_stack_top */
Hurl.HULK_FRAMEBUFFER, /* virt_fb_buffer */
};
private void initialize_cpu()
@@ -55,24 +56,25 @@ void hulk_start()
{
cli();
initialize_cpu();
gdt.initialize();
idt.initialize();
fb.initialize(cast(uint *)HULK_VIRTUAL_FRAMEBUFFER_ADDRESS,
Gdt.initialize();
Idt.initialize();
Fb.initialize(cast(uint *)Hurl.HULK_FRAMEBUFFER,
cast(uint *)hulk_header.bootinfo.fb_buffer1_phys,
hulk_header.bootinfo.fb.width,
hulk_header.bootinfo.fb.height,
hulk_header.bootinfo.fb.stride);
console.initialize();
console.clear();
klog.initialize();
Console.initialize();
Console.clear();
Klog.initialize();
klog.writefln("Welcome to HULK, the HOS UltraLight Kernel!");
Klog.writefln("Welcome to HULK, the HOS UltraLight Kernel!");
hurl.initialize(&hulk_header);
pci.initialize();
pic.initialize();
acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
apic.initialize();
Hurl.initialize(&hulk_header);
Pci.initialize();
Pic.initialize();
Acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
Apic.initialize();
Rtc.initialize();
sti();
for (;;)
+53
View File
@@ -0,0 +1,53 @@
/**
* A1 memory allocator.
*/
module hulk.hurl.a1;
import hulk.hurl;
import hulk.hippo;
import hulk.util;
import hulk.pagetable;
/**
* The A1 memory allocator is a one-shot memory allocator for kernel memory
* that is allocated but never freed.
*/
struct A1
{
/**
* Number of bytes allocated in the A1 region so far.
*/
private static __gshared size_t allocated;
/**
* Allocate memory.
*
* @param size
* Size of memory to allocate.
*
* @return Address of allocated memory. This address will always be aligned
* to a multiple of 16 bytes.
*/
public static void * allocate(size_t size)
{
/* Round size up to a multiple of 16. */
size = round_up_power_2(size, 16u);
ulong address = Hurl.A1_BASE + allocated;
ulong mapped_limit = round_up_power_2(address, PAGE_SIZE);
allocated += size;
ulong desired_limit = round_up_power_2(Hurl.A1_BASE + allocated, PAGE_SIZE);
while (desired_limit > mapped_limit)
{
void * page = Hippo.allocate_page();
Hurl.map(Hurl.A1_BASE + mapped_limit, page, PT_WRITABLE);
mapped_limit += PAGE_SIZE;
}
return cast(void *)address;
}
}
+45 -26
View File
@@ -3,7 +3,7 @@
*
* HURL provides virtual memory management for HULK.
*/
module hulk.hurl;
module hulk.hurl.hurl;
public import hulk.pagetable;
import hulk.cpu;
@@ -13,18 +13,22 @@ import hulk.klog;
import hulk.bootinfo;
import hulk.header;
import hulk.linker_addresses;
import hulk.util;
/** HULK virtual base address. */
enum ulong HULK_VIRTUAL_BASE_ADDRESS = 0xFFFF_8000_0000_0000u;
/** HULK virtual stack top address. */
enum ulong HULK_VIRTUAL_STACK_TOP_ADDRESS = 0xFFFF_A000_0000_0000u;
/** HULK virtual framebuffer address. */
enum ulong HULK_VIRTUAL_FRAMEBUFFER_ADDRESS = 0xFFFF_A000_0000_0000u;
struct hurl
struct Hurl
{
/** HULK base address. */
enum ulong HULK_BASE = 0xFFFF_8000_0000_0000u;
/** HULK stack top address. */
enum ulong HULK_STACK_TOP = 0xFFFF_8001_0000_0000u;
/** HULK framebuffer address. */
enum ulong HULK_FRAMEBUFFER = 0xFFFF_8001_0000_0000u;
/** A1 allocator range base address. */
enum ulong A1_BASE = 0xFFFF_8002_0000_0000u;
/**
* Pointer to the base page table.
*/
@@ -45,7 +49,7 @@ struct hurl
physical_address_limit,
PT_WRITABLE | PT_NO_EXECUTE);
ulong phys_address = header.bootinfo.hulk_phys;
ulong virt_address = HULK_VIRTUAL_BASE_ADDRESS;
ulong virt_address = HULK_BASE;
/* Map HULK header region. */
map_range(virt_address,
phys_address,
@@ -79,12 +83,12 @@ struct hurl
LinkerAddresses.hulk_bss_size,
PT_WRITABLE | PT_NO_EXECUTE);
/* Map HULK stack. */
map_range(HULK_VIRTUAL_STACK_TOP_ADDRESS - header.stack_size,
map_range(HULK_STACK_TOP - header.stack_size,
header.bootinfo.stack_phys,
header.stack_size,
PT_WRITABLE | PT_NO_EXECUTE);
/* Map device framebuffer. */
map_range(HULK_VIRTUAL_FRAMEBUFFER_ADDRESS,
map_range(HULK_FRAMEBUFFER,
cast(ulong)header.bootinfo.fb.buffer,
header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u,
PT_WRITABLE | PT_NO_EXECUTE);
@@ -121,7 +125,7 @@ struct hurl
reclaimed_pages += reclaim_bootloader_page_table_pages(pte.follow(), level + 1u);
}
}
hippo.free_page(pt);
Hippo.free_page(pt);
reclaimed_pages++;
return reclaimed_pages;
}
@@ -152,7 +156,7 @@ struct hurl
*/
size_t usable_memory;
size_t physical_address_limit;
const(size_t) fb_size = (header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u + PAGE_SIZE - 1u) & ~(PAGE_SIZE - 1u);
const(size_t) fb_size = round_up_power_2(header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u, PAGE_SIZE);
ulong[2][2] reserved = [
[header.bootinfo.hulk_phys, LinkerAddresses.hulk_binary_size],
[cast(ulong)header.bootinfo.fb.buffer, fb_size],
@@ -186,7 +190,7 @@ struct hurl
}
if (!is_reserved)
{
hippo.free_page(phys);
Hippo.free_page(phys);
}
phys += PAGE_SIZE;
}
@@ -213,11 +217,11 @@ struct hurl
usable_memory += LinkerAddresses.hulk_bss_size;
usable_memory += header.stack_size;
usable_memory += fb_size;
klog.writefln("Usable memory: %uKB", usable_memory >> 10u);
klog.writefln("Kernel size: %uKB", (LinkerAddresses.hulk_binary_size + LinkerAddresses.hulk_bss_size + header.stack_size) >> 10u);
Klog.writefln("Usable memory: %uKB", usable_memory >> 10u);
Klog.writefln("Kernel size: %uKB", (LinkerAddresses.hulk_binary_size + LinkerAddresses.hulk_bss_size + header.stack_size) >> 10u);
}
public static void map(T, U)(T virtual, U physical, ulong flags)
public static void map(ulong virtual, ulong physical, ulong flags)
{
PageTable * pt = m_pt_base;
for (size_t level = 0; level < 4u; level++)
@@ -244,7 +248,12 @@ struct hurl
}
}
public static void map_range(size_t virtual, size_t physical, size_t length, ulong flags)
public static void map(T, U)(T virtual, U physical, ulong flags)
{
map(cast(ulong)virtual, cast(ulong)physical, flags);
}
public static void map_range(ulong virtual, ulong physical, size_t length, ulong flags)
{
size_t end = virtual + length;
while (virtual < end)
@@ -255,23 +264,33 @@ struct hurl
}
}
public static void identity_map_range(size_t address, size_t length, ulong flags)
public static void map_range(T, U)(T virtual, U physical, size_t length, ulong flags)
{
map_range(cast(ulong)virtual, cast(ulong)physical, length, flags);
}
public static void identity_map_range(ulong address, size_t length, ulong flags)
{
size_t end = address + length;
for (size_t page = address & ~0xFFFu; page < end; page += PAGE_SIZE)
for (size_t page = address & 0xFFFF_FFFF_FFFF_F000u; page < end; page += PAGE_SIZE)
{
map(page, page, flags);
}
}
public static void identity_map_range(T)(T address, size_t length, ulong flags)
{
identity_map_range(cast(ulong)address, length, flags);
}
public static void debug_lookup(void * address)
{
klog.writefln("Debugging page table lookup of 0x%x", address);
Klog.writefln("Debugging page table lookup of 0x%x", address);
PageTable * pt = m_pt_base;
for (size_t level = 0; level < 4u; level++)
{
PageTableEntry pte = *pt.entry(address, level);
klog.writefln("Level %u, index %u, entry = 0x%x", level, pt.index(address, level), pte);
Klog.writefln("Level %u, index %u, entry = 0x%x", level, pt.index(address, level), pte);
if (pte.present)
{
pt = pte.follow();
@@ -289,7 +308,7 @@ struct hurl
private static PageTable * allocate_pt()
{
PageTable * pt = cast(PageTable *)hippo.allocate_page();
PageTable * pt = cast(PageTable *)Hippo.allocate_page();
memset64(pt, 0u, PAGE_SIZE / 8u);
return pt;
}
+3
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@@ -0,0 +1,3 @@
module hulk.hurl;
public import hulk.hurl.hurl;
+29 -13
View File
@@ -10,11 +10,16 @@ import hulk.console;
import hulk.klog;
import hulk.apic;
struct idt
struct Idt
{
public static enum ulong EXCEPTION_LAPIC_TIMER = 0x70u;
public static enum ulong EXCEPTION_LAPIC_LINT0 = 0x71u;
public static enum ulong EXCEPTION_LAPIC_LINT1 = 0x72u;
/* The I/O APIC is configured to map IRQ 0 to interrupt 64 (0x40). */
public static enum ulong INT_APIC_BASE = 0x40u; /* IRQ 0 */
public static enum ulong INT_APIC_COUNT = 24u;
public static enum ulong INT_APIC_TIMER = 0x70u;
public static enum ulong INT_APIC_LINT0 = 0x71u;
public static enum ulong INT_APIC_LINT1 = 0x72u;
public static enum ulong INT_APIC_SPURIOUS = 0xFFu;
struct idtr_t
{
@@ -91,7 +96,7 @@ struct idt
((offset & 0xFFFF_0000u) << 32u) |
(dpl << 45u) |
((trap ? 1uL : 0uL) << 40u) |
(gdt.SELECTOR_KERNEL_CODE << 16u) |
(Gdt.SELECTOR_KERNEL_CODE << 16u) |
(offset & 0xFFFFu);
idt[index][1] = offset >> 32u;
}
@@ -99,19 +104,30 @@ struct idt
public extern(C) void isr(ulong vector, ulong arg)
{
if ((idt.EXCEPTION_LAPIC_TIMER <= vector) && (vector <= idt.EXCEPTION_LAPIC_LINT1))
if ((vector >= Idt.INT_APIC_BASE) && (vector < (Idt.INT_APIC_BASE + Idt.INT_APIC_COUNT)))
{
apic.isr(vector);
Apic.isr(vector);
}
else
{
console.clear();
fb.clear(0xFF8000u);
klog.writefln("ISR %u, 0x%x", vector, arg);
__asm("cli", "");
for (;;)
switch (vector)
{
__asm("hlt", "");
case Idt.INT_APIC_TIMER:
case Idt.INT_APIC_LINT0:
case Idt.INT_APIC_LINT1:
case Idt.INT_APIC_SPURIOUS:
Apic.isr(vector);
break;
default:
Console.clear();
Fb.clear(0xFF8000u);
Klog.writefln("ISR %u, 0x%x", vector, arg);
__asm("cli", "");
for (;;)
{
__asm("hlt", "");
}
}
}
}
+2 -2
View File
@@ -7,7 +7,7 @@ import core.stdc.stdarg;
import hulk.console;
static import hulk.writef;
struct klog
struct Klog
{
/**
* Kernel buffer size log.
@@ -40,7 +40,7 @@ struct klog
public static void writef(string s, va_list args)
{
hulk.writef.writef(s, args, function void(ubyte ch) {
console.write(ch);
Console.write(ch);
});
}
+2 -2
View File
@@ -31,7 +31,7 @@ enum ulong MTRRPHYSBASE_TYPE_MASK = 0xFFu;
enum ulong MTRRPHYSMASK_PHYSMASK_MASK = 0x000F_FFFF_FFFF_F000u;
enum ulong MTRRPHYSMASK_VALID = 0x800u;
struct mtrr
struct Mtrr
{
public static void initialize()
{
@@ -41,7 +41,7 @@ struct mtrr
cpuid1(&ebx, &ecx, &edx);
if ((edx & CPUID_1_EDX_MTRR) == 0u)
{
klog.writefln("CPU does not support MTRR");
Klog.writefln("CPU does not support MTRR");
return;
}
const(ulong) mtrrcap = rdmsr(MSR_MTRRCAP);
+102 -18
View File
@@ -3,7 +3,7 @@ module hulk.pci;
import hulk.cpu;
import hulk.klog;
struct pci
struct Pci
{
/* IO address for PCI configuration address. */
enum IO_ADDR_CONFIG_ADDRESS = 0xCF8u;
@@ -11,38 +11,122 @@ struct pci
/* IO address for PCI configuration data. */
enum IO_ADDR_CONFIG_DATA = 0xCFCu;
private static ulong read_config_register(ulong bus_id, ulong device_id, ulong register_id)
struct Address
{
ulong addr = 0x8000_0000u | (bus_id << 16u) | (device_id << 11u) | (register_id << 2u);
out32(IO_ADDR_CONFIG_ADDRESS, addr);
/** Bus number (0-255). */
ubyte bus_nr;
/** Device number (0-31). */
ubyte device_nr;
/** Function number (0-7). */
ubyte function_nr;
}
struct SerialBusController
{
enum ID = 0x0Cu;
struct USBController
{
enum ID = 0x03u;
struct XHCIController
{
enum ID = 0x30u;
}
}
}
private static uint read_config_register(Address address, uint register_id)
{
uint cfg_addr = 0x8000_0000u |
(address.bus_nr << 16u) |
(address.device_nr << 11u) |
(address.function_nr << 8u) |
(register_id << 2u);
out32(IO_ADDR_CONFIG_ADDRESS, cfg_addr);
return in32(IO_ADDR_CONFIG_DATA);
}
private static void scan(ulong bus_id, ulong device_id)
private static void write_config_register(Address address, uint register_id, uint value)
{
ulong reg0 = read_config_register(bus_id, device_id, 0u);
uint cfg_addr = 0x8000_0000u |
(address.bus_nr << 16u) |
(address.device_nr << 11u) |
(address.function_nr << 8u) |
(register_id << 2u);
out32(IO_ADDR_CONFIG_ADDRESS, cfg_addr);
out32(IO_ADDR_CONFIG_DATA, value);
}
private static void init_device(ubyte class_id, ubyte subclass_id, ubyte if_id)
{
switch (class_id)
{
case SerialBusController.ID:
switch (subclass_id)
{
case SerialBusController.USBController.ID:
switch (if_id)
{
case SerialBusController.USBController.XHCIController.ID:
/* TODO */
break;
default: break;
}
break;
default: break;
}
break;
default: break;
}
}
private static void scan(Address address)
{
ulong reg0 = read_config_register(address, 0u);
if (reg0 != 0xFFFFFFFFu)
{
ulong reg2 = read_config_register(bus_id, device_id, 2u);
klog.writefln("Found PCI device %04x:%04x (%02x:%02x:%02x) at %02u:%02u",
(reg0 & 0xFFFFu), (reg0 >> 16u),
(reg2 >> 24u) & 0xFFu,
(reg2 >> 16u) & 0xFFu,
(reg2 >> 8u) & 0xFFu,
bus_id, device_id);
uint reg2 = read_config_register(address, 2u);
ushort vendor_id = reg0 & 0xFFFFu;
ushort device_id = (reg0 >> 16u) & 0xFFFFu;
ubyte class_id = (reg2 >> 24u) & 0xFFu;
ubyte subclass_id = (reg2 >> 16u) & 0xFFu;
ubyte if_id = (reg2 >> 8u) & 0xFFu;
Klog.writefln("Found PCI device %04x:%04x (%02x:%02x:%02x) at %02u:%02u.%u",
vendor_id, device_id,
class_id, subclass_id, if_id,
address.bus_nr, address.device_nr, address.function_nr);
init_device(class_id, subclass_id, if_id);
if (address.function_nr == 0u)
{
uint reg3 = read_config_register(address, 3u);
if ((reg3 & (1u << 23u)) != 0u)
{
/* Multi-function device found. */
for (address.function_nr = 1u; address.function_nr < 8u; address.function_nr++)
{
scan(address);
}
}
}
}
}
public static void initialize()
{
klog.writefln("Scanning PCI devices...");
for (ulong bus_id = 0u; bus_id < 256u; bus_id++)
Klog.writefln("Scanning PCI devices...");
for (uint bus_nr = 0u; bus_nr < 256u; bus_nr++)
{
for (ulong device_id = 0u; device_id < 32u; device_id++)
for (ubyte device_nr = 0u; device_nr < 32u; device_nr++)
{
scan(bus_id, device_id);
scan(Address(cast(ubyte)bus_nr, device_nr, 0u));
}
}
klog.writefln("PCI scan complete.");
Klog.writefln("PCI scan complete.");
}
}
+1 -1
View File
@@ -5,7 +5,7 @@ module hulk.pic;
import hulk.cpu;
struct pic
struct Pic
{
public static void initialize()
{
+42
View File
@@ -0,0 +1,42 @@
/**
* PIT (Programmable Interval Timer) functionality.
*/
module hulk.pit;
import hulk.cpu;
import hulk.klog;
struct Pit
{
/** PIT input frequency in 1/1000 Hz. */
private enum ulong PIT_FREQUENCY_1000HZ = 1_193_181_667u;
private enum ulong TARGET_INTERRUPT_HZ = 100u;
private enum ulong TARGET_INTERRUPT_1000HZ = TARGET_INTERRUPT_HZ * 1000u;
private enum ulong PIT_DIVIDER = (PIT_FREQUENCY_1000HZ + TARGET_INTERRUPT_1000HZ / 2u) / TARGET_INTERRUPT_1000HZ;
/** PIT channel 0 I/O port. */
private enum ubyte PORT_CH_0 = 0x40u;
/** PIT channel 1 I/O port. */
private enum ubyte PORT_CH_1 = 0x41u;
/** PIT channel 2 I/O port. */
private enum ubyte PORT_CH_2 = 0x42u;
/** PIT mode/command register I/O port. */
private enum ubyte PORT_MC = 0x43u;
private enum ubyte MC_CH_0 = 0x00u;
private enum ubyte MC_LO_HI = 0x30u;
private enum ubyte MC_RATE_GENERATOR = 0x04u;
private enum ubyte MC_BINARY = 0x00u;
public static void initialize()
{
out8(PORT_MC, MC_CH_0 | MC_LO_HI | MC_RATE_GENERATOR | MC_BINARY);
out8(PORT_CH_0, PIT_DIVIDER & 0xFFu);
out8(PORT_CH_0, PIT_DIVIDER >> 8u);
}
public static void isr()
{
Klog.writefln("PIT ISR");
}
}
+149
View File
@@ -0,0 +1,149 @@
/**
* RTC (Real-Time Clock) functionality.
*/
module hulk.rtc;
import hulk.cpu;
import hulk.klog;
struct Rtc
{
private enum ubyte PORT_SELECT = 0x70u;
private enum ubyte PORT_DATA = 0x71u;
private enum ubyte DISABLE_NMI = 0x80u;
private enum ubyte REG_RTC_SECONDS = 0x0u;
private enum ubyte REG_RTC_MINUTES = 0x2u;
private enum ubyte REG_RTC_HOURS = 0x4u;
private enum ubyte REG_RTC_DAY = 0x7u;
private enum ubyte REG_RTC_MONTH = 0x8u;
private enum ubyte REG_RTC_YEAR = 0x9u;
private enum ubyte REG_SR_A = 0xAu;
private enum ubyte REG_SR_B = 0xBu;
private enum ubyte REG_SR_C = 0xCu;
private enum ubyte SR_A_RTC_UPDATE_IN_PROGRESS = 0x80u;
private enum ubyte SR_B_24HOUR = 0x02u;
private enum ubyte SR_B_BINARY = 0x04u;
private enum ubyte SR_B_ENABLE_IRQ = 0x40u;
private static __gshared bool rtc_24hour_mode;
private static __gshared bool rtc_binary_mode;
static struct time
{
public ubyte year;
public ubyte month;
public ubyte day;
public ubyte hour;
public ubyte minute;
public ubyte second;
}
public static void initialize()
{
/* Enable IRQ 8 to receive RTC interrupts. */
ubyte sr_b = read_register(REG_SR_B, true);
write_register(REG_SR_B, sr_b | SR_B_ENABLE_IRQ, true);
/* Record RTC mode flags from status register B. */
rtc_24hour_mode = (sr_b & SR_B_24HOUR) != 0u;
rtc_binary_mode = (sr_b & SR_B_BINARY) != 0u;
/* Read the current system time. */
time t = read_rtc_time();
Klog.writefln("System time is 20%02u-%02u-%02u %02u:%02u:%02u",
t.year, t.month, t.day, t.hour, t.minute, t.second);
/* Send EOI to enable more RTC interrupts and re-enable NMIs. */
eoi();
}
private static ubyte read_register(ubyte register, bool disable_nmi = false)
{
out8(PORT_SELECT, register | (disable_nmi ? DISABLE_NMI : 0u));
return in8(PORT_DATA);
}
private static void write_register(ubyte register, ubyte value, bool disable_nmi = false)
{
out8(PORT_SELECT, register | (disable_nmi ? DISABLE_NMI : 0u));
out8(PORT_DATA, value);
}
private static void eoi()
{
/* Read from status register C to clear the interrupt. */
read_register(REG_SR_C);
}
public static void isr()
{
static __gshared ulong count;
static __gshared ulong seconds;
count++;
if ((count % 1024) == 0u)
{
seconds++;
}
eoi();
}
private static time read_rtc_time()
{
time[2] times;
size_t reads;
do
{
times[reads & 1] = read_rtc_time_unsafe();
reads++;
} while ((reads < 2u) || (times[0] != times[1]));
return times[0];
}
private static time read_rtc_time_unsafe()
{
time t;
while ((read_register(REG_SR_A) & SR_A_RTC_UPDATE_IN_PROGRESS) != 0u)
{
}
t.year = read_rtc_time_register(REG_RTC_YEAR);
t.month = read_rtc_time_register(REG_RTC_MONTH);
t.day = read_rtc_time_register(REG_RTC_DAY);
t.minute = read_rtc_time_register(REG_RTC_MINUTES);
t.second = read_rtc_time_register(REG_RTC_SECONDS);
/* Hour field is treated differently because it might have 'PM' flag
* in highest bit if we're in 24-hour mode. */
ubyte hour = read_register(REG_RTC_HOURS);
ubyte pm = hour >> 7u;
hour &= 0x7Fu;
if (!rtc_binary_mode)
{
/* Hour is in BCD format; convert to binary. */
hour = bcd_to_binary(hour);
}
if (!rtc_24hour_mode)
{
/* Hour is in 12-hour format; convert to 24-hour format. */
hour = cast(ubyte)((hour % 12u) + pm * 12u);
}
t.hour = hour;
return t;
}
private static ubyte read_rtc_time_register(ubyte register)
{
ubyte value = read_register(register);
if (!rtc_binary_mode)
{
value = bcd_to_binary(value);
}
return value;
}
private static ubyte bcd_to_binary(ubyte bcd)
{
return (bcd & 0xFu) + ((bcd & 0xF0u) >> 4u) * 10u;
}
}
+17
View File
@@ -0,0 +1,17 @@
/**
* HULK utility functions.
*/
module hulk.util;
/**
* Round a value up to the next power of 2.
*
* @param v Value to round up.
* @param p Power of 2 to round up to.
*
* @return Rounded up value.
*/
T round_up_power_2(T)(T v, T p)
{
return (v + p - 1u) & ~(p - 1u);
}
+9 -1
View File
@@ -26,7 +26,15 @@ size_t writef(string s, va_list args, ch_out_fn ch_out)
{
if (escape)
{
if (c == 'x')
if (c == 'c')
{
ulong ch;
va_arg(args, ch);
ch_out(cast(ubyte)ch);
length_written++;
escape = false;
}
else if (c == 'x')
{
ulong v;
va_arg(args, v);