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No files matched your search
@@ -1,12 +1,29 @@
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|||||||
= Running HOS
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# HOS System Requirements
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||||||
|
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== Physical Machine
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HOS requires:
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||||||
|
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* A 64-bit CPU.
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* A UEFI system.
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|
* 128MB of RAM.
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|
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||||||
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# Building HOS
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||||||
|
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||||||
|
From the top level of the repository, run:
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||||||
|
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||||||
|
./rscons
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||||||
|
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||||||
|
If you get errors about missing packages, install the packages and then re-run
|
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|
the build command.
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||||||
|
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||||||
|
# Running HOS
|
||||||
|
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||||||
|
## Physical Machine
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||||||
|
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||||||
To install HOS to an EFI partition, follow these steps:
|
To install HOS to an EFI partition, follow these steps:
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|
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1. Copy build/hello/BOOTX64.EFI to EFI partition EFI/HOS.EFI. For example, from Linux:
|
1. Copy build/hello/HOS.EFI to EFI partition EFI/HOS.EFI. For example, from Linux:
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||||||
|
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||||||
sudo cp build/hello/BOOTX64.EFI /boot/efi/EFI/HOS.EFI
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sudo cp build/hello/HOS.EFI /boot/efi/EFI/HOS.EFI
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||||||
|
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||||||
2. Register EFI loader for HOS (one time only) with command:
|
2. Register EFI loader for HOS (one time only) with command:
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||||||
|
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||||||
@@ -18,7 +35,21 @@ To install HOS to an EFI partition, follow these steps:
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|
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||||||
efibootmgr -o 2,0,6,5
|
efibootmgr -o 2,0,6,5
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|
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== VirtualBox
|
At this point you should be able to boot HOS from your EFI boot selection menu.
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|
If you use GRUB, you can optionally create a GRUB boot entry to load HOS.EFI
|
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|
with an entry like this:
|
||||||
|
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|
menuentry 'HOS' {
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||||||
|
insmod part_gpt
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||||||
|
insmod chain
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set root='(hd0,gpt1)'
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|
chainloader /EFI/HOS.EFI
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|
}
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|
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||||||
|
Just update the root setting for the correction location to your system's EFI
|
||||||
|
partition.
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||||||
|
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||||||
|
## VirtualBox
|
||||||
|
|
||||||
To create a VM in VirtualBox:
|
To create a VM in VirtualBox:
|
||||||
|
|
||||||
|
|||||||
+51
-8
@@ -58,7 +58,7 @@ class Image < Builder
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|||||||
system(*%W[mformat -i #{@target} ::])
|
system(*%W[mformat -i #{@target} ::])
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system(*%W[mmd -i #{@target} ::/EFI])
|
system(*%W[mmd -i #{@target} ::/EFI])
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system(*%W[mmd -i #{@target} ::/EFI/BOOT])
|
system(*%W[mmd -i #{@target} ::/EFI/BOOT])
|
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system(*%W[mcopy -i #{@target} #{@sources.first} ::/EFI/BOOT])
|
system(*%W[mcopy -i #{@target} #{@sources.first} ::/EFI/BOOT/BOOTX64.EFI])
|
||||||
partition_contents = File.binread(@target)
|
partition_contents = File.binread(@target)
|
||||||
disk_image = empty_mb + partition_contents + empty_mb
|
disk_image = empty_mb + partition_contents + empty_mb
|
||||||
File.binwrite(@target, disk_image)
|
File.binwrite(@target, disk_image)
|
||||||
@@ -69,6 +69,18 @@ class Image < Builder
|
|||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
class CheckThreadLocal < Builder
|
||||||
|
def run(options)
|
||||||
|
map_file = File.binread(@sources.first)
|
||||||
|
if map_file =~ /\.(tdata|tbss)\b/
|
||||||
|
$stderr.puts "Error: found thread-local data in #{@sources.first}"
|
||||||
|
false
|
||||||
|
else
|
||||||
|
true
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
class FontGen < Builder
|
class FontGen < Builder
|
||||||
def run(options)
|
def run(options)
|
||||||
if @command
|
if @command
|
||||||
@@ -88,11 +100,39 @@ end
|
|||||||
|
|
||||||
hulk_env = env "hulk", use: %w[ldc2 x86_64-elf-gcc] do |env|
|
hulk_env = env "hulk", use: %w[ldc2 x86_64-elf-gcc] do |env|
|
||||||
env.add_builder(FontGen)
|
env.add_builder(FontGen)
|
||||||
|
env.add_builder(CheckThreadLocal)
|
||||||
env.FontGen("^/src/hulk/kfont.d", "font/Hack-Regular.ttf",
|
env.FontGen("^/src/hulk/kfont.d", "font/Hack-Regular.ttf",
|
||||||
"fontgen" => fontgen_env.expand("^/fontgen"))
|
"fontgen" => fontgen_env.expand("^/fontgen"))
|
||||||
env["sources"] = glob("src/hulk/**/*.d")
|
env["sources"] = glob("src/hulk/**/*.d")
|
||||||
env["sources"] << "^/src/hulk/kfont.d"
|
env["sources"] << "^/src/hulk/kfont.d"
|
||||||
env["DFLAGS"] += %w[-mtriple=x86_64-unknown-elf --betterC -release -O3 --wi --enable-cross-module-inlining -code-model=large]
|
cpu_attrs = %w[
|
||||||
|
-avx
|
||||||
|
-avx2
|
||||||
|
-avx512bf16
|
||||||
|
-avx512bitalg
|
||||||
|
-avx512bw
|
||||||
|
-avx512cd
|
||||||
|
-avx512dq
|
||||||
|
-avx512er
|
||||||
|
-avx512f
|
||||||
|
-avx512ifma
|
||||||
|
-avx512pf
|
||||||
|
-avx512vbmi
|
||||||
|
-avx512vbmi2
|
||||||
|
-avx512vl
|
||||||
|
-avx512vnni
|
||||||
|
-avx512vp2intersect
|
||||||
|
-avx512vpopcntdq
|
||||||
|
-sse
|
||||||
|
-sse-unaligned-mem
|
||||||
|
-sse2
|
||||||
|
-sse3
|
||||||
|
-sse4.1
|
||||||
|
-sse4.2
|
||||||
|
-sse4a
|
||||||
|
-ssse3
|
||||||
|
]
|
||||||
|
env["DFLAGS"] += %W[-mtriple=x86_64-unknown-elf -mattr=#{cpu_attrs.join(",")} --betterC -release -O3 --wi --enable-cross-module-inlining -code-model=large]
|
||||||
env["D_IMPORT_PATH"] += %w[src]
|
env["D_IMPORT_PATH"] += %w[src]
|
||||||
env["D_IMPORT_PATH"] << env.expand("^/src")
|
env["D_IMPORT_PATH"] << env.expand("^/src")
|
||||||
env["LD"] = "x86_64-elf-gcc"
|
env["LD"] = "x86_64-elf-gcc"
|
||||||
@@ -102,6 +142,7 @@ hulk_env = env "hulk", use: %w[ldc2 x86_64-elf-gcc] do |env|
|
|||||||
env["OBJCOPY"] = "x86_64-elf-objcopy"
|
env["OBJCOPY"] = "x86_64-elf-objcopy"
|
||||||
env.Program("^/hulk.elf", "${sources}")
|
env.Program("^/hulk.elf", "${sources}")
|
||||||
env.produces("^/hulk.elf", "^/hulk.elf.map")
|
env.produces("^/hulk.elf", "^/hulk.elf.map")
|
||||||
|
env.CheckThreadLocal(:hulk_map_check, "^/hulk.elf.map")
|
||||||
env.depends("^/hulk.elf", "src/hulk/hulk.ld")
|
env.depends("^/hulk.elf", "src/hulk/hulk.ld")
|
||||||
env["SIZE"] = "x86_64-elf-size"
|
env["SIZE"] = "x86_64-elf-size"
|
||||||
env.Size("^/hulk.size", "^/hulk.elf")
|
env.Size("^/hulk.size", "^/hulk.elf")
|
||||||
@@ -118,6 +159,7 @@ end
|
|||||||
|
|
||||||
hello_env = env "hello", use: %w[ldc2 x86_64-w64-mingw32-gcc] do |env|
|
hello_env = env "hello", use: %w[ldc2 x86_64-w64-mingw32-gcc] do |env|
|
||||||
env.add_builder(Image)
|
env.add_builder(Image)
|
||||||
|
env.add_builder(CheckThreadLocal)
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||||||
env.add_builder(HulkBinObj)
|
env.add_builder(HulkBinObj)
|
||||||
env["sources"] = glob("src/hello/**/*.d")
|
env["sources"] = glob("src/hello/**/*.d")
|
||||||
env["sources"] += glob("uefi-d/source/**/*.d")
|
env["sources"] += glob("uefi-d/source/**/*.d")
|
||||||
@@ -131,19 +173,20 @@ hello_env = env "hello", use: %w[ldc2 x86_64-w64-mingw32-gcc] do |env|
|
|||||||
env["LDFLAGS"] += %w[-nostdlib -Wl,-dll -shared -Wl,--subsystem,10 -e efi_main -Wl,-Map,${_TARGET}.map]
|
env["LDFLAGS"] += %w[-nostdlib -Wl,-dll -shared -Wl,--subsystem,10 -e efi_main -Wl,-Map,${_TARGET}.map]
|
||||||
env["LDCMD"] = %w[${LD} -o ${_TARGET} ${LDFLAGS} ${_SOURCES} ${LIBDIRPREFIX}${LIBPATH} ${LIBLINKPREFIX}${LIBS}]
|
env["LDCMD"] = %w[${LD} -o ${_TARGET} ${LDFLAGS} ${_SOURCES} ${LIBDIRPREFIX}${LIBPATH} ${LIBLINKPREFIX}${LIBS}]
|
||||||
env["OBJDUMP"] = "x86_64-w64-mingw32-objdump"
|
env["OBJDUMP"] = "x86_64-w64-mingw32-objdump"
|
||||||
env.Program("^/BOOTX64.EFI", "${sources}")
|
env.Program("^/HOS.EFI", "${sources}")
|
||||||
env.produces("^/BOOTX64.EFI", "^/BOOTX64.EFI.map")
|
env.produces("^/HOS.EFI", "^/HOS.EFI.map")
|
||||||
|
env.CheckThreadLocal(:hos_map_check, "^/HOS.EFI.map")
|
||||||
env["SIZE"] = "x86_64-w64-mingw32-size"
|
env["SIZE"] = "x86_64-w64-mingw32-size"
|
||||||
env.Size("^/BOOTX64.size", "^/BOOTX64.EFI")
|
env.Size("^/HOS.size", "^/HOS.EFI")
|
||||||
env.Disassemble("^/BOOTX64.txt", "^/BOOTX64.EFI")
|
env.Disassemble("^/HOS.txt", "^/HOS.EFI")
|
||||||
env.Image("^/HOS.img", "^/BOOTX64.EFI")
|
env.Image("^/HOS.img", "^/HOS.EFI")
|
||||||
end
|
end
|
||||||
|
|
||||||
task "run", desc: "Run HOS in QEMU" do
|
task "run", desc: "Run HOS in QEMU" do
|
||||||
Dir.mktmpdir do |tmpdir|
|
Dir.mktmpdir do |tmpdir|
|
||||||
img = hello_env.expand("^/HOS.img")
|
img = hello_env.expand("^/HOS.img")
|
||||||
FileUtils.cp(img, tmpdir)
|
FileUtils.cp(img, tmpdir)
|
||||||
sh %W[qemu-system-x86_64 -bios OVMF.fd -drive file=#{tmpdir}/HOS.img,format=raw -device qemu-xhci -device usb-tablet]
|
sh %W[qemu-system-x86_64 -cpu max -bios OVMF.fd -drive file=#{tmpdir}/HOS.img,format=raw -device qemu-xhci -device usb-tablet]
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
|||||||
+134
-63
@@ -5,17 +5,21 @@ module hello.hello;
|
|||||||
|
|
||||||
import uefi;
|
import uefi;
|
||||||
import hello.console;
|
import hello.console;
|
||||||
import hello.scratch;
|
|
||||||
import hulk.bootinfo;
|
import hulk.bootinfo;
|
||||||
import hulk.header;
|
import hulk.header;
|
||||||
import hos.page_table;
|
import hulk.pagetable;
|
||||||
import hos.cpu;
|
import hulk.cpu;
|
||||||
import hos.memory;
|
import hulk.memory;
|
||||||
import ldc.llvmasm;
|
import ldc.llvmasm;
|
||||||
|
|
||||||
__gshared EFI_SYSTEM_TABLE * st;
|
__gshared EFI_SYSTEM_TABLE * st;
|
||||||
|
/** HULK binary start address, 4KB-aligned. */
|
||||||
extern extern(C) __gshared ubyte _hulk_bin_start;
|
extern extern(C) __gshared ubyte _hulk_bin_start;
|
||||||
|
/** HULK binary end address, 4KB-aligned. */
|
||||||
extern extern(C) __gshared ubyte _hulk_bin_end;
|
extern extern(C) __gshared ubyte _hulk_bin_end;
|
||||||
|
private align(4096) __gshared ubyte[1024 * 1024] scratch_buffer;
|
||||||
|
/** Index to the memory map region being used to allocate page tables. */
|
||||||
|
private __gshared size_t memory_map_page_table_alloc_index;
|
||||||
|
|
||||||
private HulkHeader * hulk_header()
|
private HulkHeader * hulk_header()
|
||||||
{
|
{
|
||||||
@@ -37,14 +41,9 @@ private ulong hulk_bin_size()
|
|||||||
return cast(ulong)&_hulk_bin_end - cast(ulong)&_hulk_bin_start;
|
return cast(ulong)&_hulk_bin_end - cast(ulong)&_hulk_bin_start;
|
||||||
}
|
}
|
||||||
|
|
||||||
private ulong hulk_total_size()
|
|
||||||
{
|
|
||||||
return cast(ulong)hulk_header().total_size;
|
|
||||||
}
|
|
||||||
|
|
||||||
private ulong hulk_bss_size()
|
private ulong hulk_bss_size()
|
||||||
{
|
{
|
||||||
return hulk_total_size() - hulk_bin_size();
|
return cast(ulong)hulk_header().hulk_bss_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
private ulong hulk_stack_size()
|
private ulong hulk_stack_size()
|
||||||
@@ -87,9 +86,9 @@ private bool in_qemu()
|
|||||||
private bool set_graphics_mode()
|
private bool set_graphics_mode()
|
||||||
{
|
{
|
||||||
uint max_horizontal_resolution = in_qemu() ? 1920u : 0xFFFFFFFFu;
|
uint max_horizontal_resolution = in_qemu() ? 1920u : 0xFFFFFFFFu;
|
||||||
UINTN buffer_size = scratch.free();
|
UINTN buffer_size = scratch_buffer.sizeof;
|
||||||
EFI_GUID gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
|
EFI_GUID gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
|
||||||
EFI_HANDLE * handles = cast(EFI_HANDLE *)scratch.current();
|
EFI_HANDLE * handles = cast(EFI_HANDLE *)&scratch_buffer[0];
|
||||||
EFI_STATUS status = st.BootServices.LocateHandle(ByProtocol,
|
EFI_STATUS status = st.BootServices.LocateHandle(ByProtocol,
|
||||||
&gop_guid, null, &buffer_size, handles);
|
&gop_guid, null, &buffer_size, handles);
|
||||||
if (status != EFI_SUCCESS)
|
if (status != EFI_SUCCESS)
|
||||||
@@ -144,14 +143,14 @@ private bool set_graphics_mode()
|
|||||||
/**
|
/**
|
||||||
* Walk the EFI memory map and translate it to the HULK bootinfo format.
|
* Walk the EFI memory map and translate it to the HULK bootinfo format.
|
||||||
*/
|
*/
|
||||||
private void get_memory_map(ulong * bss_phys, ulong * stack_phys, ulong * physical_address_limit, UINTN * memory_map_key)
|
private void get_memory_map(ulong * physical_address_limit, UINTN * memory_map_key)
|
||||||
{
|
{
|
||||||
immutable static ubyte[] efi_to_hulk_memory_map_type = [
|
immutable static ubyte[] efi_to_hulk_memory_map_type = [
|
||||||
BootInfo.MemoryRegion.Type.Reserved, // EfiReservedMemoryType
|
BootInfo.MemoryRegion.Type.Reserved, // EfiReservedMemoryType
|
||||||
BootInfo.MemoryRegion.Type.Conventional, // EfiLoaderCode
|
BootInfo.MemoryRegion.Type.Bootloader, // EfiLoaderCode
|
||||||
BootInfo.MemoryRegion.Type.Conventional, // EfiLoaderData
|
BootInfo.MemoryRegion.Type.Bootloader, // EfiLoaderData
|
||||||
BootInfo.MemoryRegion.Type.Conventional, // EfiBootServicesCode
|
BootInfo.MemoryRegion.Type.Bootloader, // EfiBootServicesCode
|
||||||
BootInfo.MemoryRegion.Type.Conventional, // EfiBootServicesData
|
BootInfo.MemoryRegion.Type.Bootloader, // EfiBootServicesData
|
||||||
BootInfo.MemoryRegion.Type.Reserved, // EfiRuntimeServicesCode
|
BootInfo.MemoryRegion.Type.Reserved, // EfiRuntimeServicesCode
|
||||||
BootInfo.MemoryRegion.Type.Reserved, // EfiRuntimeServicesData
|
BootInfo.MemoryRegion.Type.Reserved, // EfiRuntimeServicesData
|
||||||
BootInfo.MemoryRegion.Type.Conventional, // EfiConventionalMemory
|
BootInfo.MemoryRegion.Type.Conventional, // EfiConventionalMemory
|
||||||
@@ -163,10 +162,10 @@ private void get_memory_map(ulong * bss_phys, ulong * stack_phys, ulong * physic
|
|||||||
BootInfo.MemoryRegion.Type.PalCode, // EfiPalCode
|
BootInfo.MemoryRegion.Type.PalCode, // EfiPalCode
|
||||||
];
|
];
|
||||||
*physical_address_limit = 0u;
|
*physical_address_limit = 0u;
|
||||||
UINTN memory_map_size = scratch.free();
|
UINTN memory_map_size = scratch_buffer.sizeof;
|
||||||
UINTN descriptor_size;
|
UINTN descriptor_size;
|
||||||
UINT32 descriptor_version;
|
UINT32 descriptor_version;
|
||||||
ubyte * scratch_base = scratch.current();
|
ubyte * scratch_base = cast(ubyte *)&scratch_buffer[0];
|
||||||
UINTN status = st.BootServices.GetMemoryMap(
|
UINTN status = st.BootServices.GetMemoryMap(
|
||||||
&memory_map_size,
|
&memory_map_size,
|
||||||
cast(EFI_MEMORY_DESCRIPTOR *)scratch_base,
|
cast(EFI_MEMORY_DESCRIPTOR *)scratch_base,
|
||||||
@@ -182,6 +181,8 @@ private void get_memory_map(ulong * bss_phys, ulong * stack_phys, ulong * physic
|
|||||||
size_t count;
|
size_t count;
|
||||||
bool found_bss;
|
bool found_bss;
|
||||||
bool found_stack;
|
bool found_stack;
|
||||||
|
bool found_fb_buffer1;
|
||||||
|
const(size_t) fb_size = (bootinfo().fb.stride * bootinfo().fb.height * 4u + PAGE_SIZE - 1u) & ~(PAGE_SIZE - 1u);
|
||||||
for (count = 0u; count < n_entries; count++)
|
for (count = 0u; count < n_entries; count++)
|
||||||
{
|
{
|
||||||
if (count > bootinfo().memory_map.length)
|
if (count > bootinfo().memory_map.length)
|
||||||
@@ -213,7 +214,7 @@ private void get_memory_map(ulong * bss_phys, ulong * stack_phys, ulong * physic
|
|||||||
(descriptor.Type == EfiConventionalMemory) &&
|
(descriptor.Type == EfiConventionalMemory) &&
|
||||||
(bootinfo().memory_map[count].size >= hulk_bss_size()))
|
(bootinfo().memory_map[count].size >= hulk_bss_size()))
|
||||||
{
|
{
|
||||||
*bss_phys = bootinfo().memory_map[count].base;
|
bootinfo().bss_phys = bootinfo().memory_map[count].base;
|
||||||
bootinfo().memory_map[count].base += hulk_bss_size();
|
bootinfo().memory_map[count].base += hulk_bss_size();
|
||||||
bootinfo().memory_map[count].size -= hulk_bss_size();
|
bootinfo().memory_map[count].size -= hulk_bss_size();
|
||||||
found_bss = true;
|
found_bss = true;
|
||||||
@@ -222,25 +223,59 @@ private void get_memory_map(ulong * bss_phys, ulong * stack_phys, ulong * physic
|
|||||||
(descriptor.Type == EfiConventionalMemory) &&
|
(descriptor.Type == EfiConventionalMemory) &&
|
||||||
(bootinfo().memory_map[count].size >= hulk_stack_size()))
|
(bootinfo().memory_map[count].size >= hulk_stack_size()))
|
||||||
{
|
{
|
||||||
*stack_phys = bootinfo().memory_map[count].base;
|
bootinfo().stack_phys = bootinfo().memory_map[count].base;
|
||||||
bootinfo().memory_map[count].base += hulk_stack_size();
|
bootinfo().memory_map[count].base += hulk_stack_size();
|
||||||
bootinfo().memory_map[count].size -= hulk_stack_size();
|
bootinfo().memory_map[count].size -= hulk_stack_size();
|
||||||
found_stack = true;
|
found_stack = true;
|
||||||
}
|
}
|
||||||
|
if ((!found_fb_buffer1) &&
|
||||||
|
(descriptor.Type == EfiConventionalMemory) &&
|
||||||
|
(bootinfo().memory_map[count].size >= fb_size))
|
||||||
|
{
|
||||||
|
bootinfo().fb_buffer1_phys = bootinfo().memory_map[count].base;
|
||||||
|
bootinfo().memory_map[count].base += fb_size;
|
||||||
|
bootinfo().memory_map[count].size -= fb_size;
|
||||||
|
found_fb_buffer1 = true;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
bootinfo().memory_map_count = count;
|
bootinfo().memory_map_count = count;
|
||||||
if ((!found_bss) && (!found_stack))
|
if ((!found_bss) || (!found_stack) || (!found_fb_buffer1))
|
||||||
{
|
{
|
||||||
for (;;) {}
|
for (;;) {}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
private void * alloc_pt_page()
|
||||||
|
{
|
||||||
|
BootInfo.MemoryRegion * regions = &bootinfo().memory_map[0];
|
||||||
|
for (;;)
|
||||||
|
{
|
||||||
|
BootInfo.MemoryRegion * region = &bootinfo().memory_map[memory_map_page_table_alloc_index];
|
||||||
|
if ((region.type == BootInfo.MemoryRegion.Type.Conventional) && (region.size >= PAGE_SIZE))
|
||||||
|
{
|
||||||
|
void * addr = cast(void *)region.base;
|
||||||
|
region.base += PAGE_SIZE;
|
||||||
|
region.size -= PAGE_SIZE;
|
||||||
|
return addr;
|
||||||
|
}
|
||||||
|
memory_map_page_table_alloc_index++;
|
||||||
|
if (memory_map_page_table_alloc_index >= bootinfo().memory_map_count)
|
||||||
|
{
|
||||||
|
return null;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Allocate a new page table.
|
* Allocate a new page table.
|
||||||
*/
|
*/
|
||||||
private PageTableEntry * new_page_table()
|
private PageTable * new_page_table()
|
||||||
{
|
{
|
||||||
PageTableEntry * pt = cast(PageTableEntry *)scratch.alloc(1u);
|
PageTable * pt = cast(PageTable *)alloc_pt_page();
|
||||||
|
if (pt == null)
|
||||||
|
{
|
||||||
|
return null;
|
||||||
|
}
|
||||||
memset64(pt, 0u, 512);
|
memset64(pt, 0u, 512);
|
||||||
return pt;
|
return pt;
|
||||||
}
|
}
|
||||||
@@ -252,34 +287,39 @@ private PageTableEntry * new_page_table()
|
|||||||
* @param dest_page Destination page address.
|
* @param dest_page Destination page address.
|
||||||
* @param pt_base Page table base address.
|
* @param pt_base Page table base address.
|
||||||
*/
|
*/
|
||||||
private void map4k(ulong source_page, ulong dest_page, PageTableEntry * pt_base)
|
private bool map4k(ulong source_page, ulong dest_page, PageTable * pt_base)
|
||||||
{
|
{
|
||||||
PageTableEntry * pt = pt_base;
|
PageTable * pt = pt_base;
|
||||||
PageTableEntry * next_pt;
|
|
||||||
for (size_t level = 0; level < 4u; level++)
|
for (size_t level = 0; level < 4u; level++)
|
||||||
{
|
{
|
||||||
size_t pt_index = PageTableEntry.page_table_index(source_page, level);
|
PageTableEntry * ppte = pt.entry(source_page, level);
|
||||||
if (pt[pt_index].present())
|
PageTableEntry pte = *ppte;
|
||||||
|
if (pte.present)
|
||||||
{
|
{
|
||||||
pt = pt[pt_index].next();
|
pt = pte.follow();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
PageTable * next_pt;
|
||||||
ulong addr;
|
ulong addr;
|
||||||
if (level < 3u)
|
if (level < 3u)
|
||||||
{
|
{
|
||||||
next_pt = new_page_table();
|
next_pt = new_page_table();
|
||||||
|
if (next_pt == null)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
addr = cast(ulong)next_pt;
|
addr = cast(ulong)next_pt;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
addr = dest_page;
|
addr = dest_page;
|
||||||
}
|
}
|
||||||
pt[pt_index] = PageTableEntry(addr,
|
*ppte = PageTableEntry(addr, PT_WRITABLE | PT_PRESENT);
|
||||||
0u, 0u, 0u, 0u, 0u, 0u, 1u, 1u);
|
|
||||||
pt = next_pt;
|
pt = next_pt;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -290,15 +330,19 @@ private void map4k(ulong source_page, ulong dest_page, PageTableEntry * pt_base)
|
|||||||
* @param size Region size.
|
* @param size Region size.
|
||||||
* @param pt_base Page table base address.
|
* @param pt_base Page table base address.
|
||||||
*/
|
*/
|
||||||
private void map4kregion(ulong source, ulong dest, size_t size, PageTableEntry * pt_base)
|
private bool map4kregion(ulong source, ulong dest, size_t size, PageTable * pt_base)
|
||||||
{
|
{
|
||||||
ulong end = source + size;
|
ulong end = source + size;
|
||||||
while (source < end)
|
while (source < end)
|
||||||
{
|
{
|
||||||
map4k(source, dest, pt_base);
|
if (!map4k(source, dest, pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
source += 4096u;
|
source += 4096u;
|
||||||
dest += 4096u;
|
dest += 4096u;
|
||||||
}
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -308,33 +352,37 @@ private void map4kregion(ulong source, ulong dest, size_t size, PageTableEntry *
|
|||||||
* @param dest_page Destination page address.
|
* @param dest_page Destination page address.
|
||||||
* @param pt_base Page table base address.
|
* @param pt_base Page table base address.
|
||||||
*/
|
*/
|
||||||
private void map2m(ulong source_page, ulong dest_page, PageTableEntry * pt_base)
|
private bool map2m(ulong source_page, ulong dest_page, PageTable * pt_base)
|
||||||
{
|
{
|
||||||
PageTableEntry * pt = pt_base;
|
PageTable * pt = pt_base;
|
||||||
PageTableEntry * next_pt;
|
|
||||||
for (size_t level = 0; level < 3u; level++)
|
for (size_t level = 0; level < 3u; level++)
|
||||||
{
|
{
|
||||||
size_t pt_index = PageTableEntry.page_table_index(source_page, level);
|
PageTableEntry * ppte = pt.entry(source_page, level);
|
||||||
if (pt[pt_index].present())
|
PageTableEntry pte = *ppte;
|
||||||
|
if (pte.present)
|
||||||
{
|
{
|
||||||
pt = pt[pt_index].next();
|
pt = pte.follow();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
PageTable * next_pt;
|
||||||
if (level < 2u)
|
if (level < 2u)
|
||||||
{
|
{
|
||||||
next_pt = new_page_table();
|
next_pt = new_page_table();
|
||||||
pt[pt_index] = PageTableEntry(cast(ulong)next_pt,
|
if (next_pt == null)
|
||||||
0u, 0u, 0u, 0u, 0u, 0u, 1u, 1u);
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
*ppte = PageTableEntry(next_pt, PT_WRITABLE | PT_PRESENT);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
pt[pt_index] = PageTableEntry(dest_page,
|
*ppte = PageTableEntry(dest_page, PT_HUGE_PAGE | PT_WRITABLE | PT_PRESENT);
|
||||||
0u, 0u, 1u, 0u, 0u, 0u, 1u, 1u);
|
|
||||||
}
|
}
|
||||||
pt = next_pt;
|
pt = next_pt;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -342,17 +390,27 @@ private void map2m(ulong source_page, ulong dest_page, PageTableEntry * pt_base)
|
|||||||
*
|
*
|
||||||
* @param pt_base Page table base address.
|
* @param pt_base Page table base address.
|
||||||
*/
|
*/
|
||||||
private void map_hulk(PageTableEntry * pt_base, ulong bss_phys, ulong stack_phys)
|
private bool map_hulk(PageTable * pt_base)
|
||||||
{
|
{
|
||||||
/* Map HULK bin region. */
|
/* Map HULK bin region. */
|
||||||
ulong virt = hulk_virt_base_address();
|
ulong virt = hulk_virt_base_address();
|
||||||
map4kregion(virt, hulk_bin_phys(), hulk_bin_size(), pt_base);
|
if (!map4kregion(virt, hulk_bin_phys(), hulk_bin_size(), pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
/* Map HULK bss region. */
|
/* Map HULK bss region. */
|
||||||
virt += hulk_bin_size();
|
virt += hulk_bin_size();
|
||||||
map4kregion(virt, bss_phys, hulk_bss_size(), pt_base);
|
if (!map4kregion(virt, bootinfo().bss_phys, hulk_bss_size(), pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
/* Map HULK stack. */
|
/* Map HULK stack. */
|
||||||
virt = hulk_virt_stack_top() - hulk_stack_size();
|
virt = hulk_virt_stack_top() - hulk_stack_size();
|
||||||
map4kregion(virt, stack_phys, hulk_stack_size(), pt_base);
|
if (!map4kregion(virt, bootinfo().stack_phys, hulk_stack_size(), pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -360,13 +418,20 @@ private void map_hulk(PageTableEntry * pt_base, ulong bss_phys, ulong stack_phys
|
|||||||
*
|
*
|
||||||
* @param physical_address_limit Maximum physical address to identity map.
|
* @param physical_address_limit Maximum physical address to identity map.
|
||||||
*/
|
*/
|
||||||
private void build_page_tables(ulong physical_address_limit, ulong bss_phys, ulong stack_phys)
|
private bool build_page_tables(ulong physical_address_limit)
|
||||||
{
|
{
|
||||||
PageTableEntry * pt_base = new_page_table();
|
PageTable * pt_base = new_page_table();
|
||||||
|
if (pt_base == null)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
/* Map physical RAM. */
|
/* Map physical RAM. */
|
||||||
for (size_t addr = 0u; addr < physical_address_limit; addr += (2u * 1024u * 1024u))
|
for (size_t addr = 0u; addr < physical_address_limit; addr += (2u * 1024u * 1024u))
|
||||||
{
|
{
|
||||||
map2m(addr, addr, pt_base);
|
if (!map2m(addr, addr, pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
/* Map any memory regions that are outside physical RAM. */
|
/* Map any memory regions that are outside physical RAM. */
|
||||||
for (size_t i = 0u; i < bootinfo().memory_map_count; i++)
|
for (size_t i = 0u; i < bootinfo().memory_map_count; i++)
|
||||||
@@ -374,18 +439,28 @@ private void build_page_tables(ulong physical_address_limit, ulong bss_phys, ulo
|
|||||||
ulong addr = bootinfo().memory_map[i].base;
|
ulong addr = bootinfo().memory_map[i].base;
|
||||||
if (addr >= physical_address_limit)
|
if (addr >= physical_address_limit)
|
||||||
{
|
{
|
||||||
map4kregion(addr, addr, bootinfo().memory_map[i].size, pt_base);
|
if (!map4kregion(addr, addr, bootinfo().memory_map[i].size, pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/* Map graphics framebuffer. */
|
/* Map graphics framebuffer. */
|
||||||
ulong framebuffer_size = bootinfo().fb.height * bootinfo().fb.stride * 4u;
|
ulong framebuffer_size = bootinfo().fb.height * bootinfo().fb.stride * 4u;
|
||||||
ulong fb_phys = cast(ulong)bootinfo().fb.buffer;
|
ulong fb_phys = cast(ulong)bootinfo().fb.buffer;
|
||||||
ulong fb_virt = hulk_virt_framebuffer_address();
|
ulong fb_virt = hulk_virt_framebuffer_address();
|
||||||
map4kregion(fb_virt, fb_phys, framebuffer_size, pt_base);
|
if (!map4kregion(fb_virt, fb_phys, framebuffer_size, pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
/* Map HULK regions. */
|
/* Map HULK regions. */
|
||||||
map_hulk(pt_base, bss_phys, stack_phys);
|
if (!map_hulk(pt_base))
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
/* Switch to the new page table. */
|
/* Switch to the new page table. */
|
||||||
write_cr3(cast(ulong)pt_base);
|
write_cr3(cast(ulong)pt_base);
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -448,21 +523,17 @@ extern (C) EFI_STATUS efi_main(EFI_HANDLE image_handle, EFI_SYSTEM_TABLE * st)
|
|||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
bootinfo().pt_phys = cast(ulong)scratch.current();
|
|
||||||
|
|
||||||
if (!set_graphics_mode())
|
if (!set_graphics_mode())
|
||||||
{
|
{
|
||||||
console.wait_key();
|
console.wait_key();
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
ulong bss_phys;
|
|
||||||
ulong stack_phys;
|
|
||||||
ulong physical_address_limit;
|
ulong physical_address_limit;
|
||||||
UINTN memory_map_key;
|
UINTN memory_map_key;
|
||||||
for (;;)
|
for (;;)
|
||||||
{
|
{
|
||||||
get_memory_map(&bss_phys, &stack_phys, &physical_address_limit, &memory_map_key);
|
get_memory_map(&physical_address_limit, &memory_map_key);
|
||||||
|
|
||||||
EFI_STATUS status = st.BootServices.ExitBootServices(image_handle, memory_map_key);
|
EFI_STATUS status = st.BootServices.ExitBootServices(image_handle, memory_map_key);
|
||||||
if (status == EFI_INVALID_PARAMETER)
|
if (status == EFI_INVALID_PARAMETER)
|
||||||
@@ -478,12 +549,12 @@ extern (C) EFI_STATUS efi_main(EFI_HANDLE image_handle, EFI_SYSTEM_TABLE * st)
|
|||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
build_page_tables(physical_address_limit, bss_phys, stack_phys);
|
if (!build_page_tables(physical_address_limit))
|
||||||
|
{
|
||||||
|
return EFI_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
bootinfo().hulk_phys = hulk_bin_phys();
|
bootinfo().hulk_phys = hulk_bin_phys();
|
||||||
bootinfo().bss_phys = bss_phys;
|
|
||||||
bootinfo().stack_phys = stack_phys;
|
|
||||||
bootinfo().pt_size = cast(ulong)scratch.current() - bootinfo().pt_phys;
|
|
||||||
|
|
||||||
jump_to_hulk();
|
jump_to_hulk();
|
||||||
|
|
||||||
|
|||||||
@@ -1,39 +0,0 @@
|
|||||||
/**
|
|
||||||
* HELLO scratch buffer.
|
|
||||||
*/
|
|
||||||
module hello.scratch;
|
|
||||||
|
|
||||||
struct scratch
|
|
||||||
{
|
|
||||||
/* Scratch buffer. */
|
|
||||||
private static align(4096) __gshared ubyte[1024 * 1024] scratch;
|
|
||||||
|
|
||||||
/* Number of scratch buffer bytes used. */
|
|
||||||
private static __gshared size_t scratch_used;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Get the number of free bytes in the scratch buffer.
|
|
||||||
*/
|
|
||||||
public static size_t free()
|
|
||||||
{
|
|
||||||
return scratch.sizeof - scratch_used;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Get the current free scratch buffer address.
|
|
||||||
*/
|
|
||||||
public static ubyte * current()
|
|
||||||
{
|
|
||||||
return &scratch[scratch_used];
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Allocate pages from the scratch buffer.
|
|
||||||
*/
|
|
||||||
public static ubyte * alloc(size_t n = 1)
|
|
||||||
{
|
|
||||||
ubyte * address = &scratch[scratch_used];
|
|
||||||
scratch_used += 4096u * n;
|
|
||||||
return address;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
@@ -1,71 +0,0 @@
|
|||||||
import ldc.llvmasm;
|
|
||||||
|
|
||||||
void cli()
|
|
||||||
{
|
|
||||||
__asm("cli", "");
|
|
||||||
}
|
|
||||||
|
|
||||||
void sti()
|
|
||||||
{
|
|
||||||
__asm("sti", "");
|
|
||||||
}
|
|
||||||
|
|
||||||
void hlt()
|
|
||||||
{
|
|
||||||
__asm("hlt", "");
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong read_cr0()
|
|
||||||
{
|
|
||||||
return __asm!ulong("mov %cr0, %rax", "={rax}");
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong read_cr2()
|
|
||||||
{
|
|
||||||
return __asm!ulong("mov %cr2, %rax", "={rax}");
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong read_cr3()
|
|
||||||
{
|
|
||||||
return __asm!ulong("mov %cr3, %rax", "={rax}");
|
|
||||||
}
|
|
||||||
|
|
||||||
void write_cr3(ulong v)
|
|
||||||
{
|
|
||||||
__asm("mov $0, %cr3", "r", v);
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong read_cr4()
|
|
||||||
{
|
|
||||||
return __asm!ulong("mov %cr4, %rax", "={rax}");
|
|
||||||
}
|
|
||||||
|
|
||||||
ubyte in8(ushort ioaddr)
|
|
||||||
{
|
|
||||||
return __asm!ubyte("inb %dx, %al", "={al},{dx}", ioaddr);
|
|
||||||
}
|
|
||||||
|
|
||||||
ushort in16(ushort ioaddr)
|
|
||||||
{
|
|
||||||
return __asm!ushort("inw %dx, %ax", "={ax},{dx}", ioaddr);
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong in32(ushort ioaddr)
|
|
||||||
{
|
|
||||||
return __asm!ulong("inl %dx, %eax", "={eax},{dx}", ioaddr);
|
|
||||||
}
|
|
||||||
|
|
||||||
void out8(ushort ioaddr, ubyte v)
|
|
||||||
{
|
|
||||||
__asm("outb %al, %dx", "{dx},{al}", ioaddr, v);
|
|
||||||
}
|
|
||||||
|
|
||||||
void out16(ushort ioaddr, ushort v)
|
|
||||||
{
|
|
||||||
__asm("outw %ax, %dx", "{dx},{ax}", ioaddr, v);
|
|
||||||
}
|
|
||||||
|
|
||||||
void out32(ushort ioaddr, ulong v)
|
|
||||||
{
|
|
||||||
__asm("outl %eax, %dx", "{dx},{eax}", ioaddr, v);
|
|
||||||
}
|
|
||||||
@@ -1,33 +0,0 @@
|
|||||||
struct PageTableEntry
|
|
||||||
{
|
|
||||||
ulong entry;
|
|
||||||
|
|
||||||
this(ulong address, ulong no_execute, ulong global,
|
|
||||||
ulong huge, ulong disable_cache, ulong write_through, ulong user,
|
|
||||||
ulong writable, ulong present)
|
|
||||||
{
|
|
||||||
entry = (present |
|
|
||||||
(writable << 1) |
|
|
||||||
(user << 2) |
|
|
||||||
(write_through << 3) |
|
|
||||||
(disable_cache << 4) |
|
|
||||||
(huge << 7) |
|
|
||||||
(global << 8) |
|
|
||||||
(no_execute << 63)) | address;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool present()
|
|
||||||
{
|
|
||||||
return (entry & 0x1u) != 0u;
|
|
||||||
}
|
|
||||||
|
|
||||||
PageTableEntry * next()
|
|
||||||
{
|
|
||||||
return cast(PageTableEntry *)(entry & 0x7FFF_FFFF_FFFF_F000u);
|
|
||||||
}
|
|
||||||
|
|
||||||
static ulong page_table_index(ulong address, size_t level)
|
|
||||||
{
|
|
||||||
return ((address >> (39u - 9u * level)) & 0x1FFu);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
+13
-12
@@ -3,17 +3,16 @@
|
|||||||
*/
|
*/
|
||||||
module hulk.acpi;
|
module hulk.acpi;
|
||||||
|
|
||||||
import hulk.klog;
|
|
||||||
import hulk.hurl;
|
import hulk.hurl;
|
||||||
import hulk.klog;
|
import hulk.klog;
|
||||||
import hos.memory;
|
import hulk.memory;
|
||||||
|
|
||||||
struct acpi
|
struct acpi
|
||||||
{
|
{
|
||||||
enum uint APIC_SIGNATURE = 0x43495041u;
|
enum uint APIC_SIGNATURE = 0x43495041u;
|
||||||
enum uint XSDT_SIGNATURE = 0x54445358u;
|
enum uint XSDT_SIGNATURE = 0x54445358u;
|
||||||
|
|
||||||
struct XsdtHeader
|
static struct XsdtHeader
|
||||||
{
|
{
|
||||||
uint signature;
|
uint signature;
|
||||||
uint length;
|
uint length;
|
||||||
@@ -24,16 +23,16 @@ struct acpi
|
|||||||
uint oem_revision;
|
uint oem_revision;
|
||||||
uint creator_id;
|
uint creator_id;
|
||||||
uint creator_revision;
|
uint creator_revision;
|
||||||
};
|
}
|
||||||
|
|
||||||
struct Xsdt
|
static struct Xsdt
|
||||||
{
|
{
|
||||||
XsdtHeader header;
|
XsdtHeader header;
|
||||||
uint _pad;
|
uint _pad;
|
||||||
ulong[0] tables;
|
ulong[0] tables;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct MadtHeader
|
static struct MadtHeader
|
||||||
{
|
{
|
||||||
uint signature;
|
uint signature;
|
||||||
uint length;
|
uint length;
|
||||||
@@ -48,18 +47,18 @@ struct acpi
|
|||||||
uint flags;
|
uint flags;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct MadtEntry
|
static struct MadtEntry
|
||||||
{
|
{
|
||||||
ubyte type;
|
ubyte type;
|
||||||
ubyte length;
|
ubyte length;
|
||||||
}
|
}
|
||||||
|
|
||||||
private static ulong apic_address;
|
public static __gshared ulong apic_address;
|
||||||
|
|
||||||
public static void initialize(ulong acpi_xsdt_phys)
|
public static void initialize(ulong acpi_xsdt_phys)
|
||||||
{
|
{
|
||||||
/* Map the XSDT header. */
|
/* Map the XSDT header. */
|
||||||
Hurl.map_range(acpi_xsdt_phys, Xsdt.sizeof, 0u);
|
hurl.identity_map_range(acpi_xsdt_phys, Xsdt.sizeof, 0u);
|
||||||
const(Xsdt) * xsdt = cast(const(Xsdt) *)acpi_xsdt_phys;
|
const(Xsdt) * xsdt = cast(const(Xsdt) *)acpi_xsdt_phys;
|
||||||
if (xsdt.header.signature != XSDT_SIGNATURE)
|
if (xsdt.header.signature != XSDT_SIGNATURE)
|
||||||
{
|
{
|
||||||
@@ -67,12 +66,12 @@ struct acpi
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
/* Map the entire XSDT. */
|
/* Map the entire XSDT. */
|
||||||
Hurl.map_range(acpi_xsdt_phys, xsdt.header.length, 0u);
|
hurl.identity_map_range(acpi_xsdt_phys, xsdt.header.length, 0u);
|
||||||
size_t n_entries = (xsdt.header.length - xsdt.header.sizeof) / xsdt.tables[0].sizeof;
|
size_t n_entries = (xsdt.header.length - xsdt.header.sizeof) / xsdt.tables[0].sizeof;
|
||||||
for (size_t i = 0u; i < n_entries; i++)
|
for (size_t i = 0u; i < n_entries; i++)
|
||||||
{
|
{
|
||||||
ulong address = xsdt.tables[i];
|
ulong address = xsdt.tables[i];
|
||||||
Hurl.map_range(address, 4u, 0u);
|
hurl.identity_map_range(address, 4u, 0u);
|
||||||
uint signature = *cast(const(uint) *)address;
|
uint signature = *cast(const(uint) *)address;
|
||||||
if (signature == APIC_SIGNATURE)
|
if (signature == APIC_SIGNATURE)
|
||||||
{
|
{
|
||||||
@@ -84,8 +83,9 @@ struct acpi
|
|||||||
private static parse_apic_table(ulong address)
|
private static parse_apic_table(ulong address)
|
||||||
{
|
{
|
||||||
const(MadtHeader) * madt_header = cast(const(MadtHeader) *)address;
|
const(MadtHeader) * madt_header = cast(const(MadtHeader) *)address;
|
||||||
Hurl.map_range(address, madt_header.length, 0u);
|
hurl.identity_map_range(address, madt_header.length, 0u);
|
||||||
apic_address = madt_header.local_apic_address;
|
apic_address = madt_header.local_apic_address;
|
||||||
|
klog.writefln("Found 32-bit APIC address: 0x%x", apic_address);
|
||||||
const(void) * madt_end = cast(const(void) *)(address + madt_header.length);
|
const(void) * madt_end = cast(const(void) *)(address + madt_header.length);
|
||||||
const(MadtEntry) * madt_entry = cast(const(MadtEntry) *)(address + 0x2Cu);
|
const(MadtEntry) * madt_entry = cast(const(MadtEntry) *)(address + 0x2Cu);
|
||||||
while (madt_entry < madt_end)
|
while (madt_entry < madt_end)
|
||||||
@@ -95,6 +95,7 @@ struct acpi
|
|||||||
{
|
{
|
||||||
/* Found a 64-bit Local APIC Address Override entry. */
|
/* Found a 64-bit Local APIC Address Override entry. */
|
||||||
memcpy(cast(void *)&apic_address, cast(const(void) *)madt_entry + 4u, 8u);
|
memcpy(cast(void *)&apic_address, cast(const(void) *)madt_entry + 4u, 8u);
|
||||||
|
klog.writefln("Found 64-bit APIC address: 0x%x", apic_address);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
+104
@@ -0,0 +1,104 @@
|
|||||||
|
/**
|
||||||
|
* APIC (Advanced Programmable Interrupt Controller) functionality.
|
||||||
|
*/
|
||||||
|
module hulk.apic;
|
||||||
|
|
||||||
|
import hulk.klog;
|
||||||
|
import hulk.hurl;
|
||||||
|
import hulk.acpi;
|
||||||
|
import hulk.idt;
|
||||||
|
|
||||||
|
struct apic
|
||||||
|
{
|
||||||
|
private enum uint PERIODIC_MODE = 0x2_0000u;
|
||||||
|
|
||||||
|
static struct ApicRegister
|
||||||
|
{
|
||||||
|
public uint value;
|
||||||
|
alias value this;
|
||||||
|
|
||||||
|
private ubyte[12] _padding;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct ApicRegisters
|
||||||
|
{
|
||||||
|
ApicRegister[2] _reserved0;
|
||||||
|
ApicRegister lapic_id;
|
||||||
|
ApicRegister lapic_version;
|
||||||
|
ApicRegister[4] _reserved1;
|
||||||
|
ApicRegister task_priority;
|
||||||
|
ApicRegister arbitration_priority;
|
||||||
|
ApicRegister processor_priority;
|
||||||
|
ApicRegister eoi;
|
||||||
|
ApicRegister remote_read;
|
||||||
|
ApicRegister logical_destination;
|
||||||
|
ApicRegister destination_format;
|
||||||
|
ApicRegister spurious_interrupt_vector;
|
||||||
|
ApicRegister[8] in_service;
|
||||||
|
ApicRegister[8] trigger_mode;
|
||||||
|
ApicRegister[8] interrupt_request;
|
||||||
|
ApicRegister error_status;
|
||||||
|
ApicRegister[6] _reserved2;
|
||||||
|
ApicRegister lvt_cmci;
|
||||||
|
ApicRegister[2] interrupt_command;
|
||||||
|
ApicRegister lvt_timer;
|
||||||
|
ApicRegister lvt_thermal_sensor;
|
||||||
|
ApicRegister lvt_performance_monitoring_counters;
|
||||||
|
ApicRegister[2] lvt_lint;
|
||||||
|
ApicRegister lvt_error;
|
||||||
|
ApicRegister initial_count;
|
||||||
|
ApicRegister current_count;
|
||||||
|
ApicRegister[4] _reserved3;
|
||||||
|
ApicRegister divide_configuration;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct IoApicRegisters
|
||||||
|
{
|
||||||
|
ApicRegister address;
|
||||||
|
ApicRegister data;
|
||||||
|
}
|
||||||
|
|
||||||
|
private static __gshared ApicRegisters * apic_registers;
|
||||||
|
private static __gshared IoApicRegisters * io_apic_registers;
|
||||||
|
|
||||||
|
public static void initialize()
|
||||||
|
{
|
||||||
|
apic_registers = cast(ApicRegisters *)acpi.apic_address;
|
||||||
|
io_apic_registers = cast(IoApicRegisters *)0xFEC0_0000u;
|
||||||
|
hurl.map(cast(ulong)apic_registers, cast(ulong)apic_registers,
|
||||||
|
PT_WRITABLE | PT_WRITE_THROUGH | PT_DISABLE_CACHE | PT_NO_EXECUTE);
|
||||||
|
hurl.map(cast(ulong)io_apic_registers, cast(ulong)io_apic_registers,
|
||||||
|
PT_WRITABLE | PT_WRITE_THROUGH | PT_DISABLE_CACHE | PT_NO_EXECUTE);
|
||||||
|
klog.writefln("LAPIC ID: 0x%08x", apic_registers.lapic_id.value);
|
||||||
|
klog.writefln("LAPIC version: 0x%08x", apic_registers.lapic_version.value);
|
||||||
|
/* Enable local APIC to receive interrupts and set spurious interrupt
|
||||||
|
* vector to 0xFF. */
|
||||||
|
apic_registers.spurious_interrupt_vector.value = 0x1FFu;
|
||||||
|
// apic_registers.lvt_timer.value = idt.INT_LAPIC_TIMER | PERIODIC_MODE;
|
||||||
|
apic_registers.lvt_timer.value = idt.INT_LAPIC_TIMER;
|
||||||
|
apic_registers.lvt_lint[0].value = idt.INT_LAPIC_LINT0;
|
||||||
|
apic_registers.lvt_lint[1].value = idt.INT_LAPIC_LINT1;
|
||||||
|
// apic_registers.divide_configuration.value = 3u;
|
||||||
|
configure_io_apic_irq(8u, 0x48u);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void configure_io_apic_irq(size_t io_apic_irq, size_t interrupt_id)
|
||||||
|
{
|
||||||
|
ulong entry = interrupt_id;
|
||||||
|
io_apic_registers.address.value = cast(uint)(0x10u + io_apic_irq * 2u);
|
||||||
|
io_apic_registers.data.value = entry & 0xFFFF_FFFFu;
|
||||||
|
io_apic_registers.address.value = cast(uint)(0x10u + io_apic_irq * 2u + 1u);
|
||||||
|
io_apic_registers.data.value = entry >> 32u;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void eoi()
|
||||||
|
{
|
||||||
|
apic_registers.eoi.value = 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void isr(ulong vector)
|
||||||
|
{
|
||||||
|
klog.writefln("APIC ISR 0x%x", vector);
|
||||||
|
eoi();
|
||||||
|
}
|
||||||
|
}
|
||||||
+3
-5
@@ -33,6 +33,7 @@ struct BootInfo
|
|||||||
enum Type
|
enum Type
|
||||||
{
|
{
|
||||||
Reserved,
|
Reserved,
|
||||||
|
Bootloader,
|
||||||
Conventional,
|
Conventional,
|
||||||
Unusable,
|
Unusable,
|
||||||
ACPIReclaim,
|
ACPIReclaim,
|
||||||
@@ -68,11 +69,8 @@ struct BootInfo
|
|||||||
/* Physical address of stack while jumping to HULK. */
|
/* Physical address of stack while jumping to HULK. */
|
||||||
ulong stack_phys;
|
ulong stack_phys;
|
||||||
|
|
||||||
/* Physical address of page tables while jumping to HULK. */
|
/* Physical address of framebuffer buffer1. */
|
||||||
ulong pt_phys;
|
ulong fb_buffer1_phys;
|
||||||
|
|
||||||
/* Size of page tables while jumping to HULK. */
|
|
||||||
ulong pt_size;
|
|
||||||
|
|
||||||
/* Physical address of ACPI XSDT table. */
|
/* Physical address of ACPI XSDT table. */
|
||||||
ulong acpi_xsdt_phys;
|
ulong acpi_xsdt_phys;
|
||||||
|
|||||||
+247
@@ -0,0 +1,247 @@
|
|||||||
|
/**
|
||||||
|
* CPU functionality.
|
||||||
|
*/
|
||||||
|
module hulk.cpu;
|
||||||
|
|
||||||
|
import ldc.llvmasm;
|
||||||
|
|
||||||
|
/** CR0 bits. @{ */
|
||||||
|
enum ulong CR0_PE = 0x1u;
|
||||||
|
enum ulong CR0_MP = 0x2u;
|
||||||
|
enum ulong CR0_EM = 0x4u;
|
||||||
|
enum ulong CR0_TS = 0x8u;
|
||||||
|
enum ulong CR0_ET = 0x10u;
|
||||||
|
enum ulong CR0_NE = 0x20u;
|
||||||
|
enum ulong CR0_WP = 0x1_0000u;
|
||||||
|
enum ulong CR0_AM = 0x4_0000u;
|
||||||
|
enum ulong CR0_NW = 0x2000_0000u;
|
||||||
|
enum ulong CR0_CD = 0x4000_0000u;
|
||||||
|
enum ulong CR0_PG = 0x8000_0000u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** CR4 bits. @{ */
|
||||||
|
enum ulong CR4_VME = 0x1u;
|
||||||
|
enum ulong CR4_PVI = 0x2u;
|
||||||
|
enum ulong CR4_TSD = 0x4u;
|
||||||
|
enum ulong CR4_DE = 0x8u;
|
||||||
|
enum ulong CR4_PSE = 0x10u;
|
||||||
|
enum ulong CR4_PAE = 0x20u;
|
||||||
|
enum ulong CR4_MCE = 0x40u;
|
||||||
|
enum ulong CR4_PGE = 0x80u;
|
||||||
|
enum ulong CR4_PCE = 0x100u;
|
||||||
|
enum ulong CR4_OSFXSR = 0x200u;
|
||||||
|
enum ulong CR4_OSXMMEXCPT = 0x400u;
|
||||||
|
enum ulong CR4_UMIP = 0x800u;
|
||||||
|
enum ulong CR4_VMXE = 0x2000u;
|
||||||
|
enum ulong CR4_SMXE = 0x4000u;
|
||||||
|
enum ulong CR4_FSGSBASE = 0x1_0000u;
|
||||||
|
enum ulong CR4_PCIDE = 0x2_0000u;
|
||||||
|
enum ulong CR4_OSXSAVE = 0x4_0000u;
|
||||||
|
enum ulong CR4_SMEP = 0x10_0000u;
|
||||||
|
enum ulong CR4_SMAP = 0x20_0000u;
|
||||||
|
enum ulong CR4_PKE = 0x40_0000u;
|
||||||
|
enum ulong CR4_CET = 0x80_0000u;
|
||||||
|
enum ulong CR4_PKS = 0x100_0000u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** XCR0 bits. @{ */
|
||||||
|
enum ulong XCR0_X87 = 0x1u;
|
||||||
|
enum ulong XCR0_SSE = 0x2u;
|
||||||
|
enum ulong XCR0_AVX = 0x4u;
|
||||||
|
enum ulong XCR0_BNDREG = 0x8u;
|
||||||
|
enum ulong XCR0_BNDSCR = 0x10u;
|
||||||
|
enum ulong XCR0_OPMASK = 0x20u;
|
||||||
|
enum ulong XCR0_ZMM_HI256 = 0x40u;
|
||||||
|
enum ulong XCR0_HI16_ZMM = 0x80u;
|
||||||
|
enum ulong XCR0_PKRU = 0x100u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** MSR register numbers. @{ */
|
||||||
|
enum uint MSR_EFER = 0xC000_0080u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** EFER flags. @{ */
|
||||||
|
enum uint EFER_SCE = 0x1u;
|
||||||
|
enum uint EFER_LME = 0x100u;
|
||||||
|
enum uint EFER_LMA = 0x400u;
|
||||||
|
enum uint EFER_NXE = 0x800u;
|
||||||
|
enum uint EFER_SVME = 0x1000u;
|
||||||
|
enum uint EFER_LMSLE = 0x2000u;
|
||||||
|
enum uint EFER_FFXSR = 0x4000u;
|
||||||
|
enum uint EFER_TCE = 0x8000u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** CPUID 1 bits. @{ */
|
||||||
|
enum uint CPUID_1_EDX_FPU = 0x1u;
|
||||||
|
enum uint CPUID_1_EDX_VME = 0x2u;
|
||||||
|
enum uint CPUID_1_EDX_DE = 0x4u;
|
||||||
|
enum uint CPUID_1_EDX_PSE = 0x8u;
|
||||||
|
enum uint CPUID_1_EDX_TSC = 0x10u;
|
||||||
|
enum uint CPUID_1_EDX_MSR = 0x20u;
|
||||||
|
enum uint CPUID_1_EDX_PAE = 0x40u;
|
||||||
|
enum uint CPUID_1_EDX_MCE = 0x80u;
|
||||||
|
enum uint CPUID_1_EDX_CX8 = 0x100u;
|
||||||
|
enum uint CPUID_1_EDX_APIC = 0x200u;
|
||||||
|
enum uint CPUID_1_EDX_SEP = 0x800u;
|
||||||
|
enum uint CPUID_1_EDX_MTRR = 0x1000u;
|
||||||
|
enum uint CPUID_1_EDX_PGE = 0x2000u;
|
||||||
|
enum uint CPUID_1_EDX_MCA = 0x4000u;
|
||||||
|
enum uint CPUID_1_EDX_CMOV = 0x8000u;
|
||||||
|
enum uint CPUID_1_EDX_PAT = 0x1_0000u;
|
||||||
|
enum uint CPUID_1_EDX_PSE36 = 0x2_0000u;
|
||||||
|
enum uint CPUID_1_EDX_PSN = 0x4_0000u;
|
||||||
|
enum uint CPUID_1_EDX_CLFSH = 0x8_0000u;
|
||||||
|
enum uint CPUID_1_EDX_DS = 0x20_0000u;
|
||||||
|
enum uint CPUID_1_EDX_ACPI = 0x40_0000u;
|
||||||
|
enum uint CPUID_1_EDX_MMX = 0x80_0000u;
|
||||||
|
enum uint CPUID_1_EDX_FXSR = 0x100_0000u;
|
||||||
|
enum uint CPUID_1_EDX_SSE = 0x200_0000u;
|
||||||
|
enum uint CPUID_1_EDX_SSE2 = 0x400_0000u;
|
||||||
|
enum uint CPUID_1_EDX_SS = 0x800_0000u;
|
||||||
|
enum uint CPUID_1_EDX_HTT = 0x1000_0000u;
|
||||||
|
enum uint CPUID_1_EDX_TM = 0x2000_0000u;
|
||||||
|
enum uint CPUID_1_EDX_IA64 = 0x4000_0000u;
|
||||||
|
enum uint CPUID_1_EDX_PBE = 0x8000_0000u;
|
||||||
|
enum uint CPUID_1_ECX_SSE3 = 0x1u;
|
||||||
|
enum uint CPUID_1_ECX_PCLMULQDQ = 0x2u;
|
||||||
|
enum uint CPUID_1_ECX_DTES64 = 0x4u;
|
||||||
|
enum uint CPUID_1_ECX_MONITOR = 0x8u;
|
||||||
|
enum uint CPUID_1_ECX_DSCPL = 0x10u;
|
||||||
|
enum uint CPUID_1_ECX_VMX = 0x20u;
|
||||||
|
enum uint CPUID_1_ECX_SMX = 0x40u;
|
||||||
|
enum uint CPUID_1_ECX_EST = 0x80u;
|
||||||
|
enum uint CPUID_1_ECX_TM2 = 0x100u;
|
||||||
|
enum uint CPUID_1_ECX_SSSE3 = 0x200u;
|
||||||
|
enum uint CPUID_1_ECX_CNXTID = 0x400u;
|
||||||
|
enum uint CPUID_1_ECX_SDBG = 0x800u;
|
||||||
|
enum uint CPUID_1_ECX_FMA = 0x1000u;
|
||||||
|
enum uint CPUID_1_ECX_CX16 = 0x2000u;
|
||||||
|
enum uint CPUID_1_ECX_XTPR = 0x4000u;
|
||||||
|
enum uint CPUID_1_ECX_PDCM = 0x8000u;
|
||||||
|
enum uint CPUID_1_ECX_PCID = 0x2_0000u;
|
||||||
|
enum uint CPUID_1_ECX_DCA = 0x4_0000u;
|
||||||
|
enum uint CPUID_1_ECX_SSE41 = 0x8_0000u;
|
||||||
|
enum uint CPUID_1_ECX_SSE42 = 0x10_0000u;
|
||||||
|
enum uint CPUID_1_ECX_X2APIC = 0x20_0000u;
|
||||||
|
enum uint CPUID_1_ECX_MOVBE = 0x40_0000u;
|
||||||
|
enum uint CPUID_1_ECX_POPCNT = 0x80_0000u;
|
||||||
|
enum uint CPUID_1_ECX_TSCDEADLINE = 0x100_0000u;
|
||||||
|
enum uint CPUID_1_ECX_AES = 0x200_0000u;
|
||||||
|
enum uint CPUID_1_ECX_XSAVE = 0x400_0000u;
|
||||||
|
enum uint CPUID_1_ECX_OSXSAVE = 0x800_0000u;
|
||||||
|
enum uint CPUID_1_ECX_AVX = 0x1000_0000u;
|
||||||
|
enum uint CPUID_1_ECX_F16C = 0x2000_0000u;
|
||||||
|
enum uint CPUID_1_ECX_RDRND = 0x4000_0000u;
|
||||||
|
enum uint CPUID_1_ECX_HYPERVISOR = 0x8000_0000u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
void cli()
|
||||||
|
{
|
||||||
|
__asm("cli", "");
|
||||||
|
}
|
||||||
|
|
||||||
|
void sti()
|
||||||
|
{
|
||||||
|
__asm("sti", "");
|
||||||
|
}
|
||||||
|
|
||||||
|
void hlt()
|
||||||
|
{
|
||||||
|
__asm("hlt", "");
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong read_cr0()
|
||||||
|
{
|
||||||
|
return __asm!ulong("mov %cr0, %rax", "={rax}");
|
||||||
|
}
|
||||||
|
|
||||||
|
void write_cr0(ulong v)
|
||||||
|
{
|
||||||
|
__asm("mov $0, %cr0", "r", v);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong read_cr2()
|
||||||
|
{
|
||||||
|
return __asm!ulong("mov %cr2, %rax", "={rax}");
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong read_cr3()
|
||||||
|
{
|
||||||
|
return __asm!ulong("mov %cr3, %rax", "={rax}");
|
||||||
|
}
|
||||||
|
|
||||||
|
void write_cr3(ulong v)
|
||||||
|
{
|
||||||
|
__asm("mov $0, %cr3", "r", v);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong read_cr4()
|
||||||
|
{
|
||||||
|
return __asm!ulong("mov %cr4, %rax", "={rax}");
|
||||||
|
}
|
||||||
|
|
||||||
|
void write_cr4(ulong v)
|
||||||
|
{
|
||||||
|
__asm("mov $0, %cr4", "r", v);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong rdmsr(uint msr)
|
||||||
|
{
|
||||||
|
return __asm!ulong(`
|
||||||
|
rdmsr
|
||||||
|
shl $$32, %rdx
|
||||||
|
or %rdx, %rax`, "={rax},{ecx},~{rdx}", msr);
|
||||||
|
}
|
||||||
|
|
||||||
|
void wrmsr(uint msr, ulong value)
|
||||||
|
{
|
||||||
|
__asm(`wrmsr`, "{ecx},{edx},{eax}", msr, value >> 32u, value);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong xgetbv(uint xcr)
|
||||||
|
{
|
||||||
|
return __asm!ulong(`
|
||||||
|
xgetbv
|
||||||
|
shl $$32, %rdx
|
||||||
|
or %rdx, %rax`, "={rax},{ecx},~{rdx}", xcr);
|
||||||
|
}
|
||||||
|
|
||||||
|
void xsetbv(uint xcr, ulong value)
|
||||||
|
{
|
||||||
|
__asm(`xsetbv`, "{ecx},{edx},{eax}", xcr, value >> 32u, value);
|
||||||
|
}
|
||||||
|
|
||||||
|
ubyte in8(ushort ioaddr)
|
||||||
|
{
|
||||||
|
return __asm!ubyte("inb %dx, %al", "={al},{dx}", ioaddr);
|
||||||
|
}
|
||||||
|
|
||||||
|
ushort in16(ushort ioaddr)
|
||||||
|
{
|
||||||
|
return __asm!ushort("inw %dx, %ax", "={ax},{dx}", ioaddr);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong in32(ushort ioaddr)
|
||||||
|
{
|
||||||
|
return __asm!ulong("inl %dx, %eax", "={eax},{dx}", ioaddr);
|
||||||
|
}
|
||||||
|
|
||||||
|
void out8(ushort ioaddr, ubyte v)
|
||||||
|
{
|
||||||
|
__asm("outb %al, %dx", "{dx},{al}", ioaddr, v);
|
||||||
|
}
|
||||||
|
|
||||||
|
void out16(ushort ioaddr, ushort v)
|
||||||
|
{
|
||||||
|
__asm("outw %ax, %dx", "{dx},{ax}", ioaddr, v);
|
||||||
|
}
|
||||||
|
|
||||||
|
void out32(ushort ioaddr, ulong v)
|
||||||
|
{
|
||||||
|
__asm("outl %eax, %dx", "{dx},{eax}", ioaddr, v);
|
||||||
|
}
|
||||||
|
|
||||||
|
void cpuid1(uint * ebx, uint * ecx, uint * edx)
|
||||||
|
{
|
||||||
|
__asm("cpuid", "=*{ebx},=*{ecx},=*{edx},{eax}", ebx, ecx, edx, 1u);
|
||||||
|
}
|
||||||
+35
-17
@@ -3,7 +3,7 @@
|
|||||||
*/
|
*/
|
||||||
module hulk.fb;
|
module hulk.fb;
|
||||||
|
|
||||||
import hos.memory;
|
import hulk.memory;
|
||||||
import hulk.kfont;
|
import hulk.kfont;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -13,8 +13,11 @@ import hulk.kfont;
|
|||||||
*/
|
*/
|
||||||
struct fb
|
struct fb
|
||||||
{
|
{
|
||||||
/** Frame buffer base address. */
|
/** Device frame buffer base address. */
|
||||||
private __gshared static uint * m_buffer;
|
private __gshared static uint * m_device_buffer;
|
||||||
|
|
||||||
|
/** Frame buffer 1 base address. */
|
||||||
|
private __gshared static uint * m_buffer1;
|
||||||
|
|
||||||
/** Frame buffer width. */
|
/** Frame buffer width. */
|
||||||
private __gshared static uint m_width;
|
private __gshared static uint m_width;
|
||||||
@@ -47,14 +50,16 @@ struct fb
|
|||||||
/**
|
/**
|
||||||
* Initialize a frame buffer.
|
* Initialize a frame buffer.
|
||||||
*
|
*
|
||||||
* @param buffer Frame buffer base address.
|
* @param device_buffer Device frame buffer base address.
|
||||||
|
* @param buffer1 Frame buffer 1 base address.
|
||||||
* @param width Frame buffer width.
|
* @param width Frame buffer width.
|
||||||
* @param height Frame buffer height.
|
* @param height Frame buffer height.
|
||||||
* @param stride Frame buffer stride.
|
* @param stride Frame buffer stride.
|
||||||
*/
|
*/
|
||||||
static void initialize(uint * buffer, uint width, uint height, uint stride)
|
static void initialize(uint * device_buffer, uint * buffer1, uint width, uint height, uint stride)
|
||||||
{
|
{
|
||||||
m_buffer = buffer;
|
m_device_buffer = device_buffer;
|
||||||
|
m_buffer1 = buffer1;
|
||||||
m_width = width;
|
m_width = width;
|
||||||
m_height = height;
|
m_height = height;
|
||||||
m_stride = stride;
|
m_stride = stride;
|
||||||
@@ -68,7 +73,8 @@ struct fb
|
|||||||
*/
|
*/
|
||||||
static void clear(uint color = 0u)
|
static void clear(uint color = 0u)
|
||||||
{
|
{
|
||||||
memset32(m_buffer, color, m_buffer_size);
|
memset32(m_buffer1, color, m_buffer_size);
|
||||||
|
memset32(m_device_buffer, color, m_buffer_size);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -85,7 +91,8 @@ struct fb
|
|||||||
for (size_t iy = 0u; iy < height; iy++)
|
for (size_t iy = 0u; iy < height; iy++)
|
||||||
{
|
{
|
||||||
size_t buffer_index = buffer_index(x, y);
|
size_t buffer_index = buffer_index(x, y);
|
||||||
memset32(&m_buffer[buffer_index], color, width);
|
memset32(&m_buffer1[buffer_index], color, width);
|
||||||
|
memset32(&m_device_buffer[buffer_index], color, width);
|
||||||
y++;
|
y++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -101,7 +108,8 @@ struct fb
|
|||||||
static void hline(size_t x, size_t y, size_t width, uint color)
|
static void hline(size_t x, size_t y, size_t width, uint color)
|
||||||
{
|
{
|
||||||
size_t buffer_index = buffer_index(x, y);
|
size_t buffer_index = buffer_index(x, y);
|
||||||
memset32(&m_buffer[buffer_index], color, width);
|
memset32(&m_buffer1[buffer_index], color, width);
|
||||||
|
memset32(&m_device_buffer[buffer_index], color, width);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -117,7 +125,8 @@ struct fb
|
|||||||
size_t buffer_index = buffer_index(x, y);
|
size_t buffer_index = buffer_index(x, y);
|
||||||
for (size_t iy = 0u; iy < height; iy++)
|
for (size_t iy = 0u; iy < height; iy++)
|
||||||
{
|
{
|
||||||
m_buffer[buffer_index] = color;
|
m_buffer1[buffer_index] = color;
|
||||||
|
m_device_buffer[buffer_index] = color;
|
||||||
buffer_index -= m_stride;
|
buffer_index -= m_stride;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -153,17 +162,19 @@ struct fb
|
|||||||
size_t bitmap_index;
|
size_t bitmap_index;
|
||||||
for (size_t iy = 0u; iy < height; iy++)
|
for (size_t iy = 0u; iy < height; iy++)
|
||||||
{
|
{
|
||||||
|
size_t row_buffer_index = buffer_index(x, y);
|
||||||
for (size_t ix = 0u; ix < width; ix++)
|
for (size_t ix = 0u; ix < width; ix++)
|
||||||
{
|
{
|
||||||
size_t buffer_index = buffer_index(x + ix, y);
|
size_t buffer_index = row_buffer_index + ix;
|
||||||
ubyte alpha = alpha_bitmap[bitmap_index];
|
ubyte alpha = alpha_bitmap[bitmap_index];
|
||||||
uint current_color = m_buffer[buffer_index];
|
uint current_color = m_buffer1[buffer_index];
|
||||||
uint in_color_scaled = scale_color(color, alpha);
|
uint in_color_scaled = scale_color(color, alpha);
|
||||||
uint old_color_scaled = scale_color(current_color, 255u - alpha);
|
uint old_color_scaled = scale_color(current_color, 255u - alpha);
|
||||||
uint new_color = old_color_scaled + in_color_scaled;
|
uint new_color = old_color_scaled + in_color_scaled;
|
||||||
m_buffer[buffer_index] = new_color;
|
m_buffer1[buffer_index] = new_color;
|
||||||
bitmap_index++;
|
bitmap_index++;
|
||||||
}
|
}
|
||||||
|
memcpy32(&m_device_buffer[row_buffer_index], &m_buffer1[row_buffer_index], width);
|
||||||
y--;
|
y--;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -202,13 +213,15 @@ struct fb
|
|||||||
size_t bitmap_index;
|
size_t bitmap_index;
|
||||||
for (size_t iy = 0u; iy < height; iy++)
|
for (size_t iy = 0u; iy < height; iy++)
|
||||||
{
|
{
|
||||||
|
size_t row_buffer_index = buffer_index(x, y);
|
||||||
for (size_t ix = 0u; ix < width; ix++)
|
for (size_t ix = 0u; ix < width; ix++)
|
||||||
{
|
{
|
||||||
size_t buffer_index = buffer_index(x + ix, y);
|
size_t buffer_index = row_buffer_index + ix;
|
||||||
ubyte alpha = alpha_bitmap[bitmap_index];
|
ubyte alpha = alpha_bitmap[bitmap_index];
|
||||||
m_buffer[buffer_index] = (alpha << 16u) | (alpha << 8u) | alpha;
|
m_buffer1[buffer_index] = (alpha << 16u) | (alpha << 8u) | alpha;
|
||||||
bitmap_index++;
|
bitmap_index++;
|
||||||
}
|
}
|
||||||
|
memcpy32(&m_device_buffer[row_buffer_index], &m_buffer1[row_buffer_index], width);
|
||||||
y--;
|
y--;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -239,8 +252,13 @@ struct fb
|
|||||||
*/
|
*/
|
||||||
static void copy_rows_up(size_t y, size_t height, size_t offset)
|
static void copy_rows_up(size_t y, size_t height, size_t offset)
|
||||||
{
|
{
|
||||||
memcpy32(&m_buffer[buffer_index(0u, y + height + offset - 1u)],
|
size_t dest_buffer_index = buffer_index(0u, y + height + offset - 1u);
|
||||||
&m_buffer[buffer_index(0u, y + height - 1u)],
|
size_t src_buffer_index = buffer_index(0u, y + height - 1u);
|
||||||
|
memcpy32(&m_buffer1[dest_buffer_index],
|
||||||
|
&m_buffer1[src_buffer_index],
|
||||||
|
(m_stride * height));
|
||||||
|
memcpy32(&m_device_buffer[dest_buffer_index],
|
||||||
|
&m_buffer1[dest_buffer_index],
|
||||||
(m_stride * height));
|
(m_stride * height));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
+4
-4
@@ -11,14 +11,14 @@ import hulk.bootinfo;
|
|||||||
struct HulkHeader
|
struct HulkHeader
|
||||||
{
|
{
|
||||||
/**
|
/**
|
||||||
* Total size of memory to be mapped.
|
* HULK BSS size.
|
||||||
|
*
|
||||||
|
* The OS loader must map memory to a zeroed range of this size.
|
||||||
*
|
*
|
||||||
* The OS loader must ensure that virtual memory is mapped for this entire
|
|
||||||
* size.
|
|
||||||
* This value is really an integer, but is stored as a pointer because it
|
* This value is really an integer, but is stored as a pointer because it
|
||||||
* is provided by the linker and LDC does not like us to cast it.
|
* is provided by the linker and LDC does not like us to cast it.
|
||||||
*/
|
*/
|
||||||
void * total_size;
|
void * hulk_bss_size;
|
||||||
|
|
||||||
/** Entry point. */
|
/** Entry point. */
|
||||||
void * entry;
|
void * entry;
|
||||||
|
|||||||
+20
-72
@@ -1,19 +1,18 @@
|
|||||||
/**
|
/**
|
||||||
* HIPPO, the HOS In-place Physical Page Organizer.
|
* HIPPO, the HOS In-place Physical Page Organizer.
|
||||||
|
*
|
||||||
|
* HIPPO maintains a list of free physical pages "in place", meaning that the
|
||||||
|
* available page itself is used as the linked list entry so separate memory
|
||||||
|
* is not needed to keep track of the available pages.
|
||||||
*/
|
*/
|
||||||
module hulk.hippo;
|
module hulk.hippo;
|
||||||
|
|
||||||
import hulk.header;
|
|
||||||
import hulk.bootinfo;
|
|
||||||
import hulk.klog;
|
|
||||||
import hulk.linker_addresses;
|
|
||||||
|
|
||||||
struct hippo
|
struct hippo
|
||||||
{
|
{
|
||||||
/**
|
/**
|
||||||
* Linked list node entry for a physical page.
|
* Linked list node entry for a physical page.
|
||||||
*/
|
*/
|
||||||
private struct PhysicalPage
|
private static struct PhysicalPage
|
||||||
{
|
{
|
||||||
PhysicalPage * next;
|
PhysicalPage * next;
|
||||||
}
|
}
|
||||||
@@ -26,87 +25,25 @@ struct hippo
|
|||||||
/**
|
/**
|
||||||
* Number of free physical pages.
|
* Number of free physical pages.
|
||||||
*/
|
*/
|
||||||
private static __gshared size_t n_free_pages;
|
private static __gshared size_t m_n_free_pages;
|
||||||
|
|
||||||
/**
|
|
||||||
* Initialize HIPPO.
|
|
||||||
*
|
|
||||||
* Ok, what we do here is iterate through all of the memory map regions in
|
|
||||||
* the bootinfo memory_map array, and create a linked list of all free
|
|
||||||
* physical pages that are available. Within the available memory regions,
|
|
||||||
* we have to watch out for the following items:
|
|
||||||
* 1) HULK binary (text + data)
|
|
||||||
* - This includes the HULK header and bootinfo structures
|
|
||||||
* 2) HULK bss
|
|
||||||
* 3) HULK stack
|
|
||||||
* 4) Framebuffer
|
|
||||||
* 5) Page tables
|
|
||||||
*
|
|
||||||
* @param bootinfo HULK boot information structure.
|
|
||||||
*/
|
|
||||||
public static void initialize(HulkHeader * header)
|
|
||||||
{
|
|
||||||
size_t usable_memory;
|
|
||||||
ulong[2][5] reserved = [
|
|
||||||
[header.bootinfo.hulk_phys, cast(ulong)header.total_size],
|
|
||||||
[header.bootinfo.bss_phys, LinkerAddresses.hulk_bss_size],
|
|
||||||
[header.bootinfo.stack_phys, header.stack_size],
|
|
||||||
[cast(ulong)header.bootinfo.fb.buffer, header.bootinfo.fb.height * header.bootinfo.fb.stride],
|
|
||||||
[header.bootinfo.pt_phys, header.bootinfo.pt_size],
|
|
||||||
];
|
|
||||||
for (size_t ri = 0u; ri < reserved.length; ri++)
|
|
||||||
{
|
|
||||||
reserved[ri][1] += reserved[ri][0];
|
|
||||||
}
|
|
||||||
for (size_t bii = 0u; bii < header.bootinfo.memory_map_count; bii++)
|
|
||||||
{
|
|
||||||
if (header.bootinfo.memory_map[bii].type == BootInfo.MemoryRegion.Type.Conventional)
|
|
||||||
{
|
|
||||||
ulong phys = header.bootinfo.memory_map[bii].base;
|
|
||||||
ulong phys_end = phys + header.bootinfo.memory_map[bii].size;
|
|
||||||
usable_memory += header.bootinfo.memory_map[bii].size;
|
|
||||||
while (phys < phys_end)
|
|
||||||
{
|
|
||||||
bool is_reserved = false;
|
|
||||||
for (size_t ri = 0u; ri < reserved.length; ri++)
|
|
||||||
{
|
|
||||||
if ((reserved[ri][0] <= phys) && (phys < reserved[ri][1]))
|
|
||||||
{
|
|
||||||
is_reserved = true;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (!is_reserved)
|
|
||||||
{
|
|
||||||
free_page(phys);
|
|
||||||
}
|
|
||||||
phys += 4096u;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
size_t usable_kb = usable_memory >> 10u;
|
|
||||||
size_t usable_mb = usable_kb >> 10u;
|
|
||||||
size_t frac_mb = ((1000u * (usable_kb & 0x3FFu)) + 512u) >> 10u;
|
|
||||||
klog.writefln("Found %u.%03uMB of usable RAM", usable_mb, frac_mb);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Free a physical page.
|
* Free a physical page.
|
||||||
*
|
*
|
||||||
* @param phys Physical page address.
|
* @param phys Physical page address.
|
||||||
*/
|
*/
|
||||||
private static void free_page(ulong phys)
|
public static void free_page(T)(T phys)
|
||||||
{
|
{
|
||||||
PhysicalPage * pp = cast(PhysicalPage *)phys;
|
PhysicalPage * pp = cast(PhysicalPage *)phys;
|
||||||
pp.next = free_pages;
|
pp.next = free_pages;
|
||||||
free_pages = pp;
|
free_pages = pp;
|
||||||
n_free_pages++;
|
m_n_free_pages++;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Allocate a physical page.
|
* Allocate a physical page.
|
||||||
*
|
*
|
||||||
* @return Page address, or null if none available.
|
* @return Page address, or null if no pages are available.
|
||||||
*/
|
*/
|
||||||
public static void * allocate_page()
|
public static void * allocate_page()
|
||||||
{
|
{
|
||||||
@@ -115,7 +52,18 @@ struct hippo
|
|||||||
{
|
{
|
||||||
pp = free_pages;
|
pp = free_pages;
|
||||||
free_pages = free_pages.next;
|
free_pages = free_pages.next;
|
||||||
|
m_n_free_pages--;
|
||||||
}
|
}
|
||||||
return cast(void *)pp;
|
return cast(void *)pp;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Get the number of free pages.
|
||||||
|
*
|
||||||
|
* @return The number of free pages.
|
||||||
|
*/
|
||||||
|
public @property size_t n_free_pages() const
|
||||||
|
{
|
||||||
|
return m_n_free_pages;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
+32
-6
@@ -6,7 +6,7 @@ module hulk.hulk;
|
|||||||
import hulk.header;
|
import hulk.header;
|
||||||
import hulk.fb;
|
import hulk.fb;
|
||||||
import hulk.console;
|
import hulk.console;
|
||||||
import hos.memory;
|
import hulk.memory;
|
||||||
import ldc.attributes;
|
import ldc.attributes;
|
||||||
import hulk.kfont;
|
import hulk.kfont;
|
||||||
import hulk.klog;
|
import hulk.klog;
|
||||||
@@ -15,16 +15,19 @@ import hulk.hippo;
|
|||||||
import hulk.pci;
|
import hulk.pci;
|
||||||
import hulk.gdt;
|
import hulk.gdt;
|
||||||
import hulk.idt;
|
import hulk.idt;
|
||||||
import hos.cpu;
|
import hulk.cpu;
|
||||||
import ldc.llvmasm;
|
import ldc.llvmasm;
|
||||||
import hulk.pic;
|
import hulk.pic;
|
||||||
import hulk.acpi;
|
import hulk.acpi;
|
||||||
|
import hulk.apic;
|
||||||
|
import hulk.rtc;
|
||||||
|
import hulk.pit;
|
||||||
|
|
||||||
extern extern(C) __gshared ubyte _hulk_total_size;
|
extern extern(C) __gshared ubyte _hulk_bss_size;
|
||||||
|
|
||||||
@(ldc.attributes.section(".hulk_header"))
|
@(ldc.attributes.section(".hulk_header"))
|
||||||
private __gshared HulkHeader hulk_header = {
|
private __gshared HulkHeader hulk_header = {
|
||||||
&_hulk_total_size, /* total_size */
|
&_hulk_bss_size, /* hulk_bss_size */
|
||||||
&hulk_start, /* entry */
|
&hulk_start, /* entry */
|
||||||
16u * 1024u, /* stack_size */
|
16u * 1024u, /* stack_size */
|
||||||
HULK_VIRTUAL_BASE_ADDRESS, /* virt_base */
|
HULK_VIRTUAL_BASE_ADDRESS, /* virt_base */
|
||||||
@@ -32,25 +35,48 @@ private __gshared HulkHeader hulk_header = {
|
|||||||
HULK_VIRTUAL_FRAMEBUFFER_ADDRESS, /* virt_fb_buffer */
|
HULK_VIRTUAL_FRAMEBUFFER_ADDRESS, /* virt_fb_buffer */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
private void initialize_cpu()
|
||||||
|
{
|
||||||
|
/* Enable SSE. */
|
||||||
|
/* Turn off CR0.EM and turn on CR0.MP. */
|
||||||
|
write_cr0((read_cr0() & ~CR0_EM) | CR0_MP);
|
||||||
|
/* Set CR4.OSFXSR and CR4.OSXMMEXCPT. */
|
||||||
|
write_cr4(read_cr4() | CR4_OSFXSR | CR4_OSXMMEXCPT);
|
||||||
|
|
||||||
|
/* Enable OSXSAVE. */
|
||||||
|
write_cr4(read_cr4() | CR4_OSXSAVE);
|
||||||
|
|
||||||
|
/* Turn on NXE (no execute enable) flag in the EFER MSR. */
|
||||||
|
wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NXE);
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* HULK entry point.
|
* HULK entry point.
|
||||||
*/
|
*/
|
||||||
void hulk_start()
|
void hulk_start()
|
||||||
{
|
{
|
||||||
cli();
|
cli();
|
||||||
|
initialize_cpu();
|
||||||
gdt.initialize();
|
gdt.initialize();
|
||||||
idt.initialize();
|
idt.initialize();
|
||||||
fb.initialize(cast(uint *)HULK_VIRTUAL_FRAMEBUFFER_ADDRESS, hulk_header.bootinfo.fb.width, hulk_header.bootinfo.fb.height, hulk_header.bootinfo.fb.stride);
|
fb.initialize(cast(uint *)HULK_VIRTUAL_FRAMEBUFFER_ADDRESS,
|
||||||
|
cast(uint *)hulk_header.bootinfo.fb_buffer1_phys,
|
||||||
|
hulk_header.bootinfo.fb.width,
|
||||||
|
hulk_header.bootinfo.fb.height,
|
||||||
|
hulk_header.bootinfo.fb.stride);
|
||||||
console.initialize();
|
console.initialize();
|
||||||
console.clear();
|
console.clear();
|
||||||
klog.initialize();
|
klog.initialize();
|
||||||
|
|
||||||
klog.writefln("Welcome to HULK, the HOS UltraLight Kernel!");
|
klog.writefln("Welcome to HULK, the HOS UltraLight Kernel!");
|
||||||
|
|
||||||
hippo.initialize(&hulk_header);
|
hurl.initialize(&hulk_header);
|
||||||
pci.initialize();
|
pci.initialize();
|
||||||
pic.initialize();
|
pic.initialize();
|
||||||
acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
|
acpi.initialize(hulk_header.bootinfo.acpi_xsdt_phys);
|
||||||
|
apic.initialize();
|
||||||
|
rtc.initialize();
|
||||||
|
pit.initialize();
|
||||||
sti();
|
sti();
|
||||||
|
|
||||||
for (;;)
|
for (;;)
|
||||||
|
|||||||
+16
-2
@@ -2,6 +2,7 @@ SECTIONS
|
|||||||
{
|
{
|
||||||
. = 0xFFFF800000000000;
|
. = 0xFFFF800000000000;
|
||||||
_hulk_mem_start = .;
|
_hulk_mem_start = .;
|
||||||
|
_hulk_header_start = .;
|
||||||
|
|
||||||
.hulk_header :
|
.hulk_header :
|
||||||
{
|
{
|
||||||
@@ -9,6 +10,7 @@ SECTIONS
|
|||||||
}
|
}
|
||||||
|
|
||||||
. = ALIGN(4K);
|
. = ALIGN(4K);
|
||||||
|
_hulk_header_end = .;
|
||||||
_hulk_text_start = .;
|
_hulk_text_start = .;
|
||||||
|
|
||||||
.text :
|
.text :
|
||||||
@@ -18,6 +20,7 @@ SECTIONS
|
|||||||
|
|
||||||
. = ALIGN(4K);
|
. = ALIGN(4K);
|
||||||
_hulk_text_end = .;
|
_hulk_text_end = .;
|
||||||
|
_hulk_rodata_start = .;
|
||||||
|
|
||||||
.rodata :
|
.rodata :
|
||||||
{
|
{
|
||||||
@@ -26,12 +29,17 @@ SECTIONS
|
|||||||
|
|
||||||
. = ALIGN(4K);
|
. = ALIGN(4K);
|
||||||
|
|
||||||
|
_hulk_rodata_end = .;
|
||||||
|
_hulk_data_start = .;
|
||||||
|
|
||||||
.data :
|
.data :
|
||||||
{
|
{
|
||||||
*(.data)
|
*(.data)
|
||||||
}
|
}
|
||||||
|
|
||||||
. = ALIGN(4K);
|
. = ALIGN(4K);
|
||||||
|
_hulk_data_end = .;
|
||||||
|
_hulk_binary_size = . - _hulk_mem_start;
|
||||||
_hulk_bss_start = .;
|
_hulk_bss_start = .;
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
@@ -41,7 +49,13 @@ SECTIONS
|
|||||||
}
|
}
|
||||||
|
|
||||||
. = ALIGN(4K);
|
. = ALIGN(4K);
|
||||||
_hulk_bss_size = . - _hulk_bss_start;
|
_hulk_bss_end = .;
|
||||||
_hulk_mem_end = .;
|
_hulk_mem_end = .;
|
||||||
_hulk_total_size = _hulk_mem_end - _hulk_mem_start;
|
|
||||||
|
_hulk_header_size = _hulk_header_end - _hulk_header_start;
|
||||||
|
_hulk_text_size = _hulk_text_end - _hulk_text_start;
|
||||||
|
_hulk_rodata_size = _hulk_rodata_end - _hulk_rodata_start;
|
||||||
|
_hulk_data_size = _hulk_data_end - _hulk_data_start;
|
||||||
|
_hulk_bss_size = _hulk_bss_end - _hulk_bss_start;
|
||||||
|
_hulk_mem_size = _hulk_mem_end - _hulk_mem_start;
|
||||||
}
|
}
|
||||||
+249
-86
@@ -5,9 +5,14 @@
|
|||||||
*/
|
*/
|
||||||
module hulk.hurl;
|
module hulk.hurl;
|
||||||
|
|
||||||
import hos.cpu;
|
public import hulk.pagetable;
|
||||||
|
import hulk.cpu;
|
||||||
import hulk.hippo;
|
import hulk.hippo;
|
||||||
import hos.memory;
|
import hulk.memory;
|
||||||
|
import hulk.klog;
|
||||||
|
import hulk.bootinfo;
|
||||||
|
import hulk.header;
|
||||||
|
import hulk.linker_addresses;
|
||||||
|
|
||||||
/** HULK virtual base address. */
|
/** HULK virtual base address. */
|
||||||
enum ulong HULK_VIRTUAL_BASE_ADDRESS = 0xFFFF_8000_0000_0000u;
|
enum ulong HULK_VIRTUAL_BASE_ADDRESS = 0xFFFF_8000_0000_0000u;
|
||||||
@@ -18,116 +23,274 @@ enum ulong HULK_VIRTUAL_STACK_TOP_ADDRESS = 0xFFFF_A000_0000_0000u;
|
|||||||
/** HULK virtual framebuffer address. */
|
/** HULK virtual framebuffer address. */
|
||||||
enum ulong HULK_VIRTUAL_FRAMEBUFFER_ADDRESS = 0xFFFF_A000_0000_0000u;
|
enum ulong HULK_VIRTUAL_FRAMEBUFFER_ADDRESS = 0xFFFF_A000_0000_0000u;
|
||||||
|
|
||||||
/** Page table entry attributes. @{ */
|
struct hurl
|
||||||
enum ulong MAP_PRESENT = 0x1u;
|
|
||||||
enum ulong MAP_WRITABLE = 0x2u;
|
|
||||||
enum ulong MAP_USER = 0x4u;
|
|
||||||
enum ulong MAP_WRITE_THROUGH = 0x8u;
|
|
||||||
enum ulong MAP_DISABLE_CACHE = 0x10u;
|
|
||||||
enum ulong MAP_HUGE_PAGE = 0x20u;
|
|
||||||
enum ulong MAP_GLOBAL = 0x40u;
|
|
||||||
enum ulong MAP_NO_EXECUTE = 0x8000_0000_0000_0000u;
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
struct Hurl
|
|
||||||
{
|
{
|
||||||
private struct PageTableEntry
|
/**
|
||||||
{
|
* Pointer to the base page table.
|
||||||
private ulong m_entry;
|
*/
|
||||||
|
|
||||||
this(ulong address, ulong flags)
|
|
||||||
{
|
|
||||||
m_entry = address | flags;
|
|
||||||
}
|
|
||||||
|
|
||||||
this(void * address, ulong flags)
|
|
||||||
{
|
|
||||||
m_entry = cast(ulong)address | flags;
|
|
||||||
}
|
|
||||||
|
|
||||||
public @property bool present()
|
|
||||||
{
|
|
||||||
return (m_entry & MAP_PRESENT) != 0u;
|
|
||||||
}
|
|
||||||
|
|
||||||
public PageTable * follow()
|
|
||||||
{
|
|
||||||
return cast(PageTable *)(m_entry & 0x7FFF_FFFF_FFFF_F000u);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
private struct PageTable
|
|
||||||
{
|
|
||||||
public PageTableEntry opIndex(ulong address, ulong level)
|
|
||||||
{
|
|
||||||
PageTableEntry * entries = cast(PageTableEntry *)&this;
|
|
||||||
return entries[pt_index(address, level)];
|
|
||||||
}
|
|
||||||
|
|
||||||
public PageTableEntry opIndex(void * address, ulong level)
|
|
||||||
{
|
|
||||||
return opIndex(cast(ulong)address, level);
|
|
||||||
}
|
|
||||||
|
|
||||||
public PageTableEntry opIndexAssign(PageTableEntry pte, ulong address, ulong level)
|
|
||||||
{
|
|
||||||
PageTableEntry * entries = cast(PageTableEntry *)&this;
|
|
||||||
entries[pt_index(address, level)] = pte;
|
|
||||||
return pte;
|
|
||||||
}
|
|
||||||
|
|
||||||
public PageTableEntry opIndexAssign(PageTableEntry pte, void * address, ulong level)
|
|
||||||
{
|
|
||||||
return opIndexAssign(pte, cast(ulong)address, level);
|
|
||||||
}
|
|
||||||
|
|
||||||
private ulong pt_index(ulong address, ulong level)
|
|
||||||
{
|
|
||||||
return (address >> (39u - (9u * level))) & 0x1FFu;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
private static __gshared PageTable * m_pt_base;
|
private static __gshared PageTable * m_pt_base;
|
||||||
|
|
||||||
public static void initialize()
|
/**
|
||||||
|
* Build HULK page tables.
|
||||||
|
*
|
||||||
|
* @param physical_address_limit
|
||||||
|
* Limit of physical memory.
|
||||||
|
*/
|
||||||
|
private static void build_page_tables(HulkHeader * header, size_t physical_address_limit)
|
||||||
{
|
{
|
||||||
m_pt_base = cast(PageTable *)read_cr3();
|
m_pt_base = allocate_pt();
|
||||||
|
/* Identity map all physical RAM. */
|
||||||
|
map_range(0u,
|
||||||
|
0u,
|
||||||
|
physical_address_limit,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
ulong phys_address = header.bootinfo.hulk_phys;
|
||||||
|
ulong virt_address = HULK_VIRTUAL_BASE_ADDRESS;
|
||||||
|
/* Map HULK header region. */
|
||||||
|
map_range(virt_address,
|
||||||
|
phys_address,
|
||||||
|
LinkerAddresses.hulk_header_size,
|
||||||
|
PT_NO_EXECUTE);
|
||||||
|
phys_address += LinkerAddresses.hulk_header_size;
|
||||||
|
virt_address += LinkerAddresses.hulk_header_size;
|
||||||
|
/* Map HULK text region. */
|
||||||
|
map_range(virt_address,
|
||||||
|
phys_address,
|
||||||
|
LinkerAddresses.hulk_text_size,
|
||||||
|
0u);
|
||||||
|
phys_address += LinkerAddresses.hulk_text_size;
|
||||||
|
virt_address += LinkerAddresses.hulk_text_size;
|
||||||
|
/* Map HULK rodata region. */
|
||||||
|
map_range(virt_address,
|
||||||
|
phys_address,
|
||||||
|
LinkerAddresses.hulk_rodata_size,
|
||||||
|
PT_NO_EXECUTE);
|
||||||
|
phys_address += LinkerAddresses.hulk_rodata_size;
|
||||||
|
virt_address += LinkerAddresses.hulk_rodata_size;
|
||||||
|
/* Map HULK data region. */
|
||||||
|
map_range(virt_address,
|
||||||
|
phys_address,
|
||||||
|
LinkerAddresses.hulk_data_size,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
virt_address += LinkerAddresses.hulk_data_size;
|
||||||
|
/* Map HULK BSS region. */
|
||||||
|
map_range(virt_address,
|
||||||
|
header.bootinfo.bss_phys,
|
||||||
|
LinkerAddresses.hulk_bss_size,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
/* Map HULK stack. */
|
||||||
|
map_range(HULK_VIRTUAL_STACK_TOP_ADDRESS - header.stack_size,
|
||||||
|
header.bootinfo.stack_phys,
|
||||||
|
header.stack_size,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
/* Map device framebuffer. */
|
||||||
|
map_range(HULK_VIRTUAL_FRAMEBUFFER_ADDRESS,
|
||||||
|
cast(ulong)header.bootinfo.fb.buffer,
|
||||||
|
header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
/* Map framebuffer buffer1. */
|
||||||
|
map_range(cast(ulong)header.bootinfo.fb_buffer1_phys,
|
||||||
|
cast(ulong)header.bootinfo.fb_buffer1_phys,
|
||||||
|
header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u,
|
||||||
|
PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
write_cr3(cast(ulong)m_pt_base);
|
||||||
}
|
}
|
||||||
|
|
||||||
public static void map(ulong virtual, ulong physical, ulong flags)
|
/**
|
||||||
|
* Reclaim the pages that were used for the bootloader page tables.
|
||||||
|
*
|
||||||
|
* @param pt
|
||||||
|
* The page table to reclaim pages from.
|
||||||
|
* @param level
|
||||||
|
* Page table level (internally used while recursing the page tables).
|
||||||
|
*
|
||||||
|
* @return Number of pages reclaimed.
|
||||||
|
*/
|
||||||
|
private static size_t reclaim_bootloader_page_table_pages(PageTable * pt, size_t level = 0u)
|
||||||
|
{
|
||||||
|
map(pt, pt, PT_WRITABLE | PT_NO_EXECUTE);
|
||||||
|
size_t reclaimed_pages;
|
||||||
|
for (size_t i = 0u; i < PageTable.N_ENTRIES; i++)
|
||||||
|
{
|
||||||
|
PageTableEntry pte = (*pt)[i];
|
||||||
|
if (pte.present && (level < 2u) && !pte.huge)
|
||||||
|
{
|
||||||
|
/* For the first two levels of page tables, first
|
||||||
|
* recurse and free pages from the lower level page
|
||||||
|
* tables before reclaiming this entry. */
|
||||||
|
reclaimed_pages += reclaim_bootloader_page_table_pages(pte.follow(), level + 1u);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
hippo.free_page(pt);
|
||||||
|
reclaimed_pages++;
|
||||||
|
return reclaimed_pages;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Initialize HURL.
|
||||||
|
*
|
||||||
|
* @param bootinfo HULK boot information structure.
|
||||||
|
*/
|
||||||
|
public static void initialize(HulkHeader * header)
|
||||||
|
{
|
||||||
|
PageTable * bootloader_pt_base = cast(PageTable *)read_cr3();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Ok, what we do here is iterate through all of the memory map regions
|
||||||
|
* in the bootinfo memory_map array and mark each page that is not in
|
||||||
|
* use in a reserved range as available. Within the available memory
|
||||||
|
* regions, we have to watch out for the following items:
|
||||||
|
* 1) HULK binary (header + text + rodata + data)
|
||||||
|
* 2) Framebuffer
|
||||||
|
* In addition to these ranges, there are also pages for the following
|
||||||
|
* purposes that are not represented in the memory map from the
|
||||||
|
* bootloader:
|
||||||
|
* 3) HULK BSS
|
||||||
|
* 4) HULK stack
|
||||||
|
* 5) bootloader page table pages
|
||||||
|
* 6) framebuffer buffer1
|
||||||
|
*/
|
||||||
|
size_t usable_memory;
|
||||||
|
size_t physical_address_limit;
|
||||||
|
const(size_t) fb_size = (header.bootinfo.fb.height * header.bootinfo.fb.stride * 4u + PAGE_SIZE - 1u) & ~(PAGE_SIZE - 1u);
|
||||||
|
ulong[2][2] reserved = [
|
||||||
|
[header.bootinfo.hulk_phys, LinkerAddresses.hulk_binary_size],
|
||||||
|
[cast(ulong)header.bootinfo.fb.buffer, fb_size],
|
||||||
|
];
|
||||||
|
for (size_t ri = 0u; ri < reserved.length; ri++)
|
||||||
|
{
|
||||||
|
reserved[ri][1] += reserved[ri][0];
|
||||||
|
}
|
||||||
|
for (size_t bii = 0u; bii < header.bootinfo.memory_map_count; bii++)
|
||||||
|
{
|
||||||
|
if ((header.bootinfo.memory_map[bii].type == BootInfo.MemoryRegion.Type.Bootloader) ||
|
||||||
|
(header.bootinfo.memory_map[bii].type == BootInfo.MemoryRegion.Type.Conventional))
|
||||||
|
{
|
||||||
|
ulong phys = header.bootinfo.memory_map[bii].base;
|
||||||
|
ulong phys_end = phys + header.bootinfo.memory_map[bii].size;
|
||||||
|
if (phys_end > physical_address_limit)
|
||||||
|
{
|
||||||
|
physical_address_limit = phys_end;
|
||||||
|
}
|
||||||
|
usable_memory += header.bootinfo.memory_map[bii].size;
|
||||||
|
while (phys < phys_end)
|
||||||
|
{
|
||||||
|
bool is_reserved = false;
|
||||||
|
for (size_t ri = 0u; ri < reserved.length; ri++)
|
||||||
|
{
|
||||||
|
if ((reserved[ri][0] <= phys) && (phys < reserved[ri][1]))
|
||||||
|
{
|
||||||
|
is_reserved = true;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (!is_reserved)
|
||||||
|
{
|
||||||
|
hippo.free_page(phys);
|
||||||
|
}
|
||||||
|
phys += PAGE_SIZE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Now that we have available physical pages to allocate from, we can
|
||||||
|
* build new page tables to replace the bootloader page tables.
|
||||||
|
*/
|
||||||
|
build_page_tables(header, physical_address_limit);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* After we have switched to the newly constructed page tables, we can
|
||||||
|
* iterate through and free the bootloader page tables. They are most
|
||||||
|
* likely already mapped because we just identity mapped every page up
|
||||||
|
* to the physical_address_limit determined above. But just in case the
|
||||||
|
* bootloader used the last pages of RAM for the page table pages, we
|
||||||
|
* will make sure to map them as we traverse them.
|
||||||
|
*/
|
||||||
|
size_t reclaimed_bootloader_page_table_memory = reclaim_bootloader_page_table_pages(bootloader_pt_base) << 10u;
|
||||||
|
usable_memory += reclaimed_bootloader_page_table_memory;
|
||||||
|
|
||||||
|
usable_memory += LinkerAddresses.hulk_bss_size;
|
||||||
|
usable_memory += header.stack_size;
|
||||||
|
usable_memory += fb_size;
|
||||||
|
klog.writefln("Usable memory: %uKB", usable_memory >> 10u);
|
||||||
|
klog.writefln("Kernel size: %uKB", (LinkerAddresses.hulk_binary_size + LinkerAddresses.hulk_bss_size + header.stack_size) >> 10u);
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void map(T, U)(T virtual, U physical, ulong flags)
|
||||||
{
|
{
|
||||||
size_t last_level = ((flags & MAP_HUGE_PAGE) != 0u) ? 2u : 3u;
|
|
||||||
PageTable * pt = m_pt_base;
|
PageTable * pt = m_pt_base;
|
||||||
for (size_t level = 0; level <= last_level; level++)
|
for (size_t level = 0; level < 4u; level++)
|
||||||
{
|
{
|
||||||
if (level < last_level)
|
PageTableEntry * ppte = pt.entry(virtual, level);
|
||||||
|
if (level < 3u)
|
||||||
{
|
{
|
||||||
PageTableEntry entry = (*pt)[virtual, level];
|
PageTableEntry pte = *ppte;
|
||||||
if (entry.present)
|
if (pte.present)
|
||||||
{
|
{
|
||||||
pt = entry.follow();
|
pt = pte.follow();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
PageTable * next_pt = cast(PageTable *)hippo.allocate_page();
|
PageTable * next_pt = allocate_pt();
|
||||||
memset32(next_pt, 0, 4096u / 4u);
|
*ppte = PageTableEntry(next_pt, PT_WRITABLE | PT_PRESENT);
|
||||||
(*pt)[virtual, level] = PageTableEntry(next_pt, MAP_WRITABLE | MAP_PRESENT);
|
|
||||||
pt = next_pt;
|
pt = next_pt;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
(*pt)[virtual, level] = PageTableEntry(physical, flags | MAP_PRESENT);
|
*ppte = PageTableEntry(cast(ulong)physical, flags | PT_PRESENT);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
public static void map_range(size_t address, size_t length, ulong flags)
|
public static void map_range(size_t virtual, size_t physical, size_t length, ulong flags)
|
||||||
|
{
|
||||||
|
size_t end = virtual + length;
|
||||||
|
while (virtual < end)
|
||||||
|
{
|
||||||
|
map(virtual, physical, flags);
|
||||||
|
virtual += PAGE_SIZE;
|
||||||
|
physical += PAGE_SIZE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void identity_map_range(size_t address, size_t length, ulong flags)
|
||||||
{
|
{
|
||||||
size_t end = address + length;
|
size_t end = address + length;
|
||||||
for (size_t page = address & ~0xFFFu; page < end; page += 0x1000u)
|
for (size_t page = address & ~0xFFFu; page < end; page += PAGE_SIZE)
|
||||||
{
|
{
|
||||||
map(address, address, flags);
|
map(page, page, flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static void debug_lookup(void * address)
|
||||||
|
{
|
||||||
|
klog.writefln("Debugging page table lookup of 0x%x", address);
|
||||||
|
PageTable * pt = m_pt_base;
|
||||||
|
for (size_t level = 0; level < 4u; level++)
|
||||||
|
{
|
||||||
|
PageTableEntry pte = *pt.entry(address, level);
|
||||||
|
klog.writefln("Level %u, index %u, entry = 0x%x", level, pt.index(address, level), pte);
|
||||||
|
if (pte.present)
|
||||||
|
{
|
||||||
|
pt = pte.follow();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (pte.huge)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private static PageTable * allocate_pt()
|
||||||
|
{
|
||||||
|
PageTable * pt = cast(PageTable *)hippo.allocate_page();
|
||||||
|
memset64(pt, 0u, PAGE_SIZE / 8u);
|
||||||
|
return pt;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
@@ -8,9 +8,18 @@ import ldc.llvmasm;
|
|||||||
import hulk.fb;
|
import hulk.fb;
|
||||||
import hulk.console;
|
import hulk.console;
|
||||||
import hulk.klog;
|
import hulk.klog;
|
||||||
|
import hulk.apic;
|
||||||
|
import hulk.rtc;
|
||||||
|
|
||||||
struct idt
|
struct idt
|
||||||
{
|
{
|
||||||
|
/* The I/O APIC is configured to map IRQ 0 to interrupt 64 (0x40). */
|
||||||
|
public static enum ulong INT_RTC = 0x48u; /* IRQ 8 */
|
||||||
|
|
||||||
|
public static enum ulong INT_LAPIC_TIMER = 0x70u;
|
||||||
|
public static enum ulong INT_LAPIC_LINT0 = 0x71u;
|
||||||
|
public static enum ulong INT_LAPIC_LINT1 = 0x72u;
|
||||||
|
|
||||||
struct idtr_t
|
struct idtr_t
|
||||||
{
|
{
|
||||||
ushort limit;
|
ushort limit;
|
||||||
@@ -94,6 +103,19 @@ struct idt
|
|||||||
|
|
||||||
public extern(C) void isr(ulong vector, ulong arg)
|
public extern(C) void isr(ulong vector, ulong arg)
|
||||||
{
|
{
|
||||||
|
switch (vector)
|
||||||
|
{
|
||||||
|
case idt.INT_RTC:
|
||||||
|
rtc.isr();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case idt.INT_LAPIC_TIMER:
|
||||||
|
case idt.INT_LAPIC_LINT0:
|
||||||
|
case idt.INT_LAPIC_LINT1:
|
||||||
|
apic.isr(vector);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
console.clear();
|
console.clear();
|
||||||
fb.clear(0xFF8000u);
|
fb.clear(0xFF8000u);
|
||||||
klog.writefln("ISR %u, 0x%x", vector, arg);
|
klog.writefln("ISR %u, 0x%x", vector, arg);
|
||||||
@@ -102,4 +124,5 @@ public extern(C) void isr(ulong vector, ulong arg)
|
|||||||
{
|
{
|
||||||
__asm("hlt", "");
|
__asm("hlt", "");
|
||||||
}
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
+1
-1
@@ -19,7 +19,7 @@ struct klog
|
|||||||
private enum size_t KLOG_SIZE = 1u << KLOG_SIZE_LOG;
|
private enum size_t KLOG_SIZE = 1u << KLOG_SIZE_LOG;
|
||||||
|
|
||||||
/** Kernel log buffer. */
|
/** Kernel log buffer. */
|
||||||
private static __gshared align(4096) char[KLOG_SIZE] klog_buffer;
|
private static __gshared align(4096) ubyte[KLOG_SIZE] klog_buffer;
|
||||||
|
|
||||||
/** Write index in the kernel log buffer. */
|
/** Write index in the kernel log buffer. */
|
||||||
private static __gshared size_t klog_index;
|
private static __gshared size_t klog_index;
|
||||||
|
|||||||
+104
-6
@@ -3,39 +3,137 @@
|
|||||||
*/
|
*/
|
||||||
module hulk.linker_addresses;
|
module hulk.linker_addresses;
|
||||||
|
|
||||||
private extern extern(C) __gshared ubyte _hulk_mem_start;
|
private extern extern(C) __gshared ubyte _hulk_header_start;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_header_end;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_header_size;
|
||||||
|
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_text_start;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_text_end;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_text_size;
|
||||||
|
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_rodata_start;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_rodata_end;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_rodata_size;
|
||||||
|
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_data_start;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_data_end;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_data_size;
|
||||||
|
|
||||||
private extern extern(C) __gshared ubyte _hulk_bss_start;
|
private extern extern(C) __gshared ubyte _hulk_bss_start;
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_bss_end;
|
||||||
private extern extern(C) __gshared ubyte _hulk_bss_size;
|
private extern extern(C) __gshared ubyte _hulk_bss_size;
|
||||||
|
|
||||||
|
/* hulk_binary includes header, text, rodata, and data */
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_binary_size;
|
||||||
|
|
||||||
|
/* hulk_mem includes header, text, rodata, data, and bss */
|
||||||
|
private extern extern(C) __gshared ubyte _hulk_mem_start;
|
||||||
private extern extern(C) __gshared ubyte _hulk_mem_end;
|
private extern extern(C) __gshared ubyte _hulk_mem_end;
|
||||||
private extern extern(C) __gshared ubyte _hulk_total_size;
|
private extern extern(C) __gshared ubyte _hulk_mem_size;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* This struct provides access to linker-defined symbols.
|
* This struct provides access to linker-defined symbols.
|
||||||
*/
|
*/
|
||||||
public struct LinkerAddresses
|
public struct LinkerAddresses
|
||||||
{
|
{
|
||||||
public static @property ulong hulk_mem_start()
|
public static @property ulong hulk_header_start()
|
||||||
{
|
{
|
||||||
return cast(ulong)&_hulk_mem_start;
|
return cast(ulong)&_hulk_header_start;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_header_end()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_header_end;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_header_size()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_header_size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
public static @property ulong hulk_text_start()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_text_start;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_text_end()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_text_end;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_text_size()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_text_size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
public static @property ulong hulk_rodata_start()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_rodata_start;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_rodata_end()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_rodata_end;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_rodata_size()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_rodata_size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
public static @property ulong hulk_data_start()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_data_start;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_data_end()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_data_end;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_data_size()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_data_size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
public static @property ulong hulk_bss_start()
|
public static @property ulong hulk_bss_start()
|
||||||
{
|
{
|
||||||
return cast(ulong)&_hulk_bss_start;
|
return cast(ulong)&_hulk_bss_start;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static @property ulong hulk_bss_end()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_bss_end;
|
||||||
|
}
|
||||||
|
|
||||||
public static @property ulong hulk_bss_size()
|
public static @property ulong hulk_bss_size()
|
||||||
{
|
{
|
||||||
return cast(ulong)&_hulk_bss_size;
|
return cast(ulong)&_hulk_bss_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
public static @property ulong hulk_binary_size()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_binary_size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
public static @property ulong hulk_mem_start()
|
||||||
|
{
|
||||||
|
return cast(ulong)&_hulk_mem_start;
|
||||||
|
}
|
||||||
|
|
||||||
public static @property ulong hulk_mem_end()
|
public static @property ulong hulk_mem_end()
|
||||||
{
|
{
|
||||||
return cast(ulong)&_hulk_mem_end;
|
return cast(ulong)&_hulk_mem_end;
|
||||||
}
|
}
|
||||||
|
|
||||||
public static @property ulong hulk_total_size()
|
public static @property ulong hulk_mem_size()
|
||||||
{
|
{
|
||||||
return cast(ulong)&_hulk_total_size;
|
return cast(ulong)&_hulk_mem_size;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -1,3 +1,8 @@
|
|||||||
|
/**
|
||||||
|
* Memory-related functions.
|
||||||
|
*/
|
||||||
|
module hulk.memory;
|
||||||
|
|
||||||
import ldc.llvmasm;
|
import ldc.llvmasm;
|
||||||
|
|
||||||
void memset(void * dest, ubyte v, size_t n)
|
void memset(void * dest, ubyte v, size_t n)
|
||||||
@@ -0,0 +1,70 @@
|
|||||||
|
/**
|
||||||
|
* MTRR (Memory Type Range Register) support for HULK.
|
||||||
|
*/
|
||||||
|
module hulk.mtrr;
|
||||||
|
|
||||||
|
import hulk.cpu;
|
||||||
|
import hulk.klog;
|
||||||
|
|
||||||
|
enum ulong MTRR_TYPE_UC = 0u; /* Uncacheable */
|
||||||
|
enum ulong MTRR_TYPE_WC = 1u; /* Write-Combining */
|
||||||
|
enum ulong MTRR_TYPE_WT = 4u; /* Writethrough */
|
||||||
|
enum ulong MTRR_TYPE_WP = 5u; /* Write-Protect */
|
||||||
|
enum ulong MTRR_TYPE_WB = 6u; /* Writeback */
|
||||||
|
|
||||||
|
enum uint MSR_MTRRCAP = 0xFEu;
|
||||||
|
enum uint MSR_MTRRDEFTYPE = 0x2FFu;
|
||||||
|
enum uint MSR_MTRRPHYSBASE0 = 0x200u;
|
||||||
|
enum uint MSR_MTRRPHYSMASK0 = 0x201u;
|
||||||
|
|
||||||
|
enum ulong MTRRCAP_WC = 0x400u;
|
||||||
|
enum ulong MTRRCAP_FIX = 0x100u;
|
||||||
|
enum ulong MTRRCAP_VCNT_MASK = 0xFFu;
|
||||||
|
|
||||||
|
enum ulong MTRRDEFTYPE_E = 0x800u;
|
||||||
|
enum ulong MTRRDEFTYPE_FE = 0x400u;
|
||||||
|
enum ulong MTRRDEFTYPE_TYPE_MASK = 0xFFu;
|
||||||
|
|
||||||
|
enum ulong MTRRPHYSBASE_PHYSBASE_MASK = 0x000F_FFFF_FFFF_F000u;
|
||||||
|
enum ulong MTRRPHYSBASE_TYPE_MASK = 0xFFu;
|
||||||
|
|
||||||
|
enum ulong MTRRPHYSMASK_PHYSMASK_MASK = 0x000F_FFFF_FFFF_F000u;
|
||||||
|
enum ulong MTRRPHYSMASK_VALID = 0x800u;
|
||||||
|
|
||||||
|
struct mtrr
|
||||||
|
{
|
||||||
|
public static void initialize()
|
||||||
|
{
|
||||||
|
uint ebx;
|
||||||
|
uint ecx;
|
||||||
|
uint edx;
|
||||||
|
cpuid1(&ebx, &ecx, &edx);
|
||||||
|
if ((edx & CPUID_1_EDX_MTRR) == 0u)
|
||||||
|
{
|
||||||
|
klog.writefln("CPU does not support MTRR");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
const(ulong) mtrrcap = rdmsr(MSR_MTRRCAP);
|
||||||
|
const(ulong) mtrrdeftype = rdmsr(MSR_MTRRDEFTYPE);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static ulong get_phys_base(uint n)
|
||||||
|
{
|
||||||
|
return rdmsr(MSR_MTRRPHYSBASE0 + 2u * n);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void set_phys_base(uint n, ulong physbase)
|
||||||
|
{
|
||||||
|
wrmsr(MSR_MTRRPHYSBASE0 + 2u * n, physbase);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static ulong get_phys_mask(uint n)
|
||||||
|
{
|
||||||
|
return rdmsr(MSR_MTRRPHYSMASK0 + 2u * n);
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void set_phys_mask(uint n, ulong physmask)
|
||||||
|
{
|
||||||
|
wrmsr(MSR_MTRRPHYSMASK0 + 2u * n, physmask);
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -0,0 +1,185 @@
|
|||||||
|
/**
|
||||||
|
* Page table structures.
|
||||||
|
*/
|
||||||
|
module hulk.pagetable;
|
||||||
|
|
||||||
|
/** Page table entry attributes. @{ */
|
||||||
|
enum ulong PT_PRESENT = 0x1u;
|
||||||
|
enum ulong PT_WRITABLE = 0x2u;
|
||||||
|
enum ulong PT_USER = 0x4u;
|
||||||
|
enum ulong PT_WRITE_THROUGH = 0x8u;
|
||||||
|
enum ulong PT_DISABLE_CACHE = 0x10u;
|
||||||
|
enum ulong PT_ACCESSED = 0x20u;
|
||||||
|
enum ulong PT_DIRTY = 0x40u;
|
||||||
|
enum ulong PT_HUGE_PAGE = 0x80u;
|
||||||
|
enum ulong PT_GLOBAL = 0x100u;
|
||||||
|
enum ulong PT_NO_EXECUTE = 0x8000_0000_0000_0000u;
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** Page size in bytes. */
|
||||||
|
enum ulong PAGE_SIZE = 4096u;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Structure that represents a page table entry.
|
||||||
|
*/
|
||||||
|
struct PageTableEntry
|
||||||
|
{
|
||||||
|
/** The raw page table entry is a 64-bit ulong. */
|
||||||
|
public ulong entry;
|
||||||
|
alias entry this;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Construct a page table entry.
|
||||||
|
*
|
||||||
|
* @param address
|
||||||
|
* Address pointed to by the page table entry (ulong or pointer).
|
||||||
|
* @param flags
|
||||||
|
* Page table flags (ORed set of PT_*).
|
||||||
|
*/
|
||||||
|
this(T)(T address, ulong flags = 0u)
|
||||||
|
{
|
||||||
|
entry = cast(ulong)address | flags;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is present.
|
||||||
|
*/
|
||||||
|
public @property bool present() const
|
||||||
|
{
|
||||||
|
return (entry & PT_PRESENT) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is writable.
|
||||||
|
*/
|
||||||
|
public @property bool writable() const
|
||||||
|
{
|
||||||
|
return (entry & PT_WRITABLE) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is a user page.
|
||||||
|
*/
|
||||||
|
public @property bool user() const
|
||||||
|
{
|
||||||
|
return (entry & PT_USER) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is write-through.
|
||||||
|
*/
|
||||||
|
public @property bool write_through() const
|
||||||
|
{
|
||||||
|
return (entry & PT_WRITE_THROUGH) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page has disable cache set.
|
||||||
|
*/
|
||||||
|
public @property bool disable_cache() const
|
||||||
|
{
|
||||||
|
return (entry & PT_DISABLE_CACHE) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is huge.
|
||||||
|
*/
|
||||||
|
public @property bool huge() const
|
||||||
|
{
|
||||||
|
return (entry & PT_HUGE_PAGE) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is global.
|
||||||
|
*/
|
||||||
|
public @property bool global() const
|
||||||
|
{
|
||||||
|
return (entry & PT_GLOBAL) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is no-execute.
|
||||||
|
*/
|
||||||
|
public @property bool no_execute() const
|
||||||
|
{
|
||||||
|
return (entry & PT_NO_EXECUTE) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is dirty.
|
||||||
|
*/
|
||||||
|
public @property bool dirty() const
|
||||||
|
{
|
||||||
|
return (entry & PT_DIRTY) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Return whether the page is accessed.
|
||||||
|
*/
|
||||||
|
public @property bool accessed() const
|
||||||
|
{
|
||||||
|
return (entry & PT_ACCESSED) != 0u;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Follow the page table entry to the next page table it points to.
|
||||||
|
*/
|
||||||
|
public PageTable * follow() const
|
||||||
|
{
|
||||||
|
return cast(PageTable *)(entry & 0x7FFF_FFFF_FFFF_F000u);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
static assert(PageTableEntry.sizeof == 8u);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Structure that represents a page table.
|
||||||
|
*/
|
||||||
|
struct PageTable
|
||||||
|
{
|
||||||
|
/** Number of page table entries in a page table. */
|
||||||
|
enum size_t N_ENTRIES = 512u;
|
||||||
|
|
||||||
|
/** Page table entries. */
|
||||||
|
private PageTableEntry[N_ENTRIES] entries;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Access the PageTableEntry for the given address and page table level.
|
||||||
|
*
|
||||||
|
* @param address
|
||||||
|
* Address to look up the page table entry (ulong or pointer).
|
||||||
|
* @param level
|
||||||
|
* Page table level (0-4).
|
||||||
|
*/
|
||||||
|
public PageTableEntry * entry(T)(T address, ulong level)
|
||||||
|
{
|
||||||
|
return &entries[index(cast(ulong)address, level)];
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Determine the index into the page table for the given address and page
|
||||||
|
* table level.
|
||||||
|
*
|
||||||
|
* @param address
|
||||||
|
* Address to look up the page table entry (ulong or pointer).
|
||||||
|
* @param level
|
||||||
|
* Page table level (0-4).
|
||||||
|
*/
|
||||||
|
public ulong index(T)(T address, ulong level)
|
||||||
|
{
|
||||||
|
return (cast(ulong)address >> (39u - (9u * level))) & 0x1FFu;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Access a page table entry by linear index.
|
||||||
|
*
|
||||||
|
* @param index
|
||||||
|
* Page table index (0-511).
|
||||||
|
*
|
||||||
|
* @return PageTableEntry at the given index.
|
||||||
|
*/
|
||||||
|
public PageTableEntry opIndex(size_t index)
|
||||||
|
{
|
||||||
|
return entries[index];
|
||||||
|
}
|
||||||
|
}
|
||||||
|
static assert(PageTable.sizeof == 4096u);
|
||||||
+1
-1
@@ -1,6 +1,6 @@
|
|||||||
module hulk.pci;
|
module hulk.pci;
|
||||||
|
|
||||||
import hos.cpu;
|
import hulk.cpu;
|
||||||
import hulk.klog;
|
import hulk.klog;
|
||||||
|
|
||||||
struct pci
|
struct pci
|
||||||
|
|||||||
+1
-1
@@ -3,7 +3,7 @@
|
|||||||
*/
|
*/
|
||||||
module hulk.pic;
|
module hulk.pic;
|
||||||
|
|
||||||
import hos.cpu;
|
import hulk.cpu;
|
||||||
|
|
||||||
struct pic
|
struct pic
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -0,0 +1,42 @@
|
|||||||
|
/**
|
||||||
|
* PIT (Programmable Interval Timer) functionality.
|
||||||
|
*/
|
||||||
|
module hulk.pit;
|
||||||
|
|
||||||
|
import hulk.cpu;
|
||||||
|
import hulk.klog;
|
||||||
|
|
||||||
|
struct pit
|
||||||
|
{
|
||||||
|
/** PIT input frequency in 1/1000 Hz. */
|
||||||
|
private enum ulong PIT_FREQUENCY_1000HZ = 1_193_181_667u;
|
||||||
|
private enum ulong TARGET_INTERRUPT_HZ = 100u;
|
||||||
|
private enum ulong TARGET_INTERRUPT_1000HZ = TARGET_INTERRUPT_HZ * 1000u;
|
||||||
|
private enum ulong PIT_DIVIDER = (PIT_FREQUENCY_1000HZ + TARGET_INTERRUPT_1000HZ / 2u) / TARGET_INTERRUPT_1000HZ;
|
||||||
|
|
||||||
|
/** PIT channel 0 I/O port. */
|
||||||
|
private enum ubyte PORT_CH_0 = 0x40u;
|
||||||
|
/** PIT channel 1 I/O port. */
|
||||||
|
private enum ubyte PORT_CH_1 = 0x41u;
|
||||||
|
/** PIT channel 2 I/O port. */
|
||||||
|
private enum ubyte PORT_CH_2 = 0x42u;
|
||||||
|
/** PIT mode/command register I/O port. */
|
||||||
|
private enum ubyte PORT_MC = 0x43u;
|
||||||
|
|
||||||
|
private enum ubyte MC_CH_0 = 0x00u;
|
||||||
|
private enum ubyte MC_LO_HI = 0x30u;
|
||||||
|
private enum ubyte MC_RATE_GENERATOR = 0x04u;
|
||||||
|
private enum ubyte MC_BINARY = 0x00u;
|
||||||
|
|
||||||
|
public static void initialize()
|
||||||
|
{
|
||||||
|
out8(PORT_MC, MC_CH_0 | MC_LO_HI | MC_RATE_GENERATOR | MC_BINARY);
|
||||||
|
out8(PORT_CH_0, PIT_DIVIDER & 0xFFu);
|
||||||
|
out8(PORT_CH_0, PIT_DIVIDER >> 8u);
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void isr()
|
||||||
|
{
|
||||||
|
klog.writefln("PIT ISR");
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -0,0 +1,58 @@
|
|||||||
|
/**
|
||||||
|
* RTC (Real-Time Clock) functionality.
|
||||||
|
*/
|
||||||
|
module hulk.rtc;
|
||||||
|
|
||||||
|
import hulk.cpu;
|
||||||
|
import hulk.klog;
|
||||||
|
import hulk.apic;
|
||||||
|
|
||||||
|
struct rtc
|
||||||
|
{
|
||||||
|
private enum ubyte PORT_SELECT = 0x70u;
|
||||||
|
private enum ubyte PORT_DATA = 0x71u;
|
||||||
|
|
||||||
|
private enum ubyte DISABLE_NMI = 0x80u;
|
||||||
|
|
||||||
|
private enum ubyte SR_A = 0xAu;
|
||||||
|
private enum ubyte SR_B = 0xBu;
|
||||||
|
private enum ubyte SR_C = 0xCu;
|
||||||
|
|
||||||
|
private enum ubyte SR_B_ENABLE_IRQ = 0x40u;
|
||||||
|
|
||||||
|
public static void initialize()
|
||||||
|
{
|
||||||
|
/* Enable IRQ 8 to receive RTC interrupts. */
|
||||||
|
out8(PORT_SELECT, DISABLE_NMI | SR_B);
|
||||||
|
ubyte sr_b = in8(PORT_DATA);
|
||||||
|
out8(PORT_SELECT, DISABLE_NMI | SR_B);
|
||||||
|
out8(PORT_DATA, sr_b | SR_B_ENABLE_IRQ);
|
||||||
|
|
||||||
|
out8(PORT_SELECT, DISABLE_NMI | SR_A);
|
||||||
|
klog.writefln("SR_A = 0x%x", in8(PORT_DATA));
|
||||||
|
|
||||||
|
/* Send EOI to enable more RTC interrupts and re-enable NMIs. */
|
||||||
|
eoi();
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void eoi()
|
||||||
|
{
|
||||||
|
/* Read from status register C to clear the interrupt. */
|
||||||
|
out8(PORT_SELECT, SR_C);
|
||||||
|
in8(PORT_DATA);
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void isr()
|
||||||
|
{
|
||||||
|
static __gshared ulong count;
|
||||||
|
static __gshared ulong seconds;
|
||||||
|
count++;
|
||||||
|
if ((count % 1024) == 0u)
|
||||||
|
{
|
||||||
|
seconds++;
|
||||||
|
klog.writefln("Seconds: %u", seconds);
|
||||||
|
}
|
||||||
|
eoi();
|
||||||
|
apic.eoi();
|
||||||
|
}
|
||||||
|
}
|
||||||
+4
-4
@@ -88,9 +88,9 @@ size_t writef(string s, va_list args, ch_out_fn ch_out)
|
|||||||
*/
|
*/
|
||||||
private size_t write_hex(ulong v, bool upper, char pad, size_t width, ch_out_fn ch_out)
|
private size_t write_hex(ulong v, bool upper, char pad, size_t width, ch_out_fn ch_out)
|
||||||
{
|
{
|
||||||
static __gshared string hex_chars_lower = "0123456789abcdef";
|
static __gshared const(char)[16] hex_chars_lower = "0123456789abcdef";
|
||||||
static __gshared string hex_chars_upper = "0123456789ABCDEF";
|
static __gshared const(char)[16] hex_chars_upper = "0123456789ABCDEF";
|
||||||
static __gshared char[16] buf;
|
char[16] buf;
|
||||||
size_t i;
|
size_t i;
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
@@ -126,7 +126,7 @@ private size_t write_hex(ulong v, bool upper, char pad, size_t width, ch_out_fn
|
|||||||
*/
|
*/
|
||||||
private size_t write_udec(ulong v, char pad, size_t width, ch_out_fn ch_out)
|
private size_t write_udec(ulong v, char pad, size_t width, ch_out_fn ch_out)
|
||||||
{
|
{
|
||||||
static __gshared char[20] buf;
|
char[20] buf;
|
||||||
size_t i;
|
size_t i;
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
|
|||||||
Reference in new issue
Block a user